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[/] [rxaui_interface_and_xaui_to_rxaui_interface_adapter/] [TxPath/] [sip_rxaui_tx_glue.v] - Blame information for rev 2

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1 2 tsahidanie
//-----------------------------------------------------------------------------
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// Title         : Rxaui Tx Glue Logic
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// Project       : SIP
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//-----------------------------------------------------------------------------
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// File          : sip_rxaui_tx_glue.v
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// Author        : Lior Valency
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// Created       : 19/02/2008 
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// Last modified : 19/02/2008 
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//-----------------------------------------------------------------------------
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// Description : This module receive the data from rxaui fifo and from xpcs
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// and muxed between them according to media interface.
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//-----------------------------------------------------------------------------
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// Copyright (c) 2007  Marvell International Ltd.
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//
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// THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL SEMICONDUCTOR, INC.
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// NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT
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// OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE
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// DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.
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// THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESS,
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// IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.
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//
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//------------------------------------------------------------------------------
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// Modification history :
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// 12/12/2007  : created
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//-----------------------------------------------------------------------------
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`timescale 10ps / 10ps
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module sip_rxaui_tx_glue (/*AUTOARG*/
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   // Outputs
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   fifo_type, rxaui_tx_data,
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   // Inputs
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   media_interface_mode, serdes_mode, fifo_rxaui_tx_data0,
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   fifo_rxaui_tx_data1, txdata_serdes0
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   );
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`include "sip_rxaui_params.inc"
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   ///////////////
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   // INTERFACE //
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   ///////////////
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   // Configuration
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   input                       media_interface_mode;
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   input                       serdes_mode;
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   // Fifo interface
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   input [SERDES_DATA_W-1:0]   fifo_rxaui_tx_data0;
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   input [SERDES_DATA_W-1:0]   fifo_rxaui_tx_data1;
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   output                      fifo_type;
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   // Serdes interface
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   output [SERDES_DATA_W-1:0]  rxaui_tx_data;
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   // XPCS interface
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   input [SERDES_DATA_W-1:0]   txdata_serdes0;
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   ////////////////////////////////
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   // Internal Registers & Wires //
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   ////////////////////////////////
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   ///////////
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   // Logic //
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   ///////////
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   // In case we are working in Rxaui or mode the input
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   // data bus is 20bits and output data to serdes is 10bits (double frequency).
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   // Fifo should read every line in 2cc.
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   assign fifo_type = media_interface_mode | serdes_mode;
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   // Bypass rxaui logic
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   assign rxaui_tx_data = ((media_interface_mode == UNSET) || (serdes_mode == SET)) ? fifo_rxaui_tx_data0 :
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                          {fifo_rxaui_tx_data1[SERDES_DATA_W/2-1:0],fifo_rxaui_tx_data0[SERDES_DATA_W/2-1:0]};
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endmodule // sip_rxaui_tx_glue

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