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jlechner |
/* Simulator tracing/debugging support.
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Copyright (C) 1997, 1998, 2001, 2007, 2008 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This file is meant to be included by sim-basics.h. */
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#ifndef SIM_TRACE_H
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#define SIM_TRACE_H
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/* Standard traceable entities. */
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enum {
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/* Trace insn execution. */
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TRACE_INSN_IDX = 1,
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/* Trace insn decoding.
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??? This is more of a simulator debugging operation and might best be
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moved to --debug-decode. */
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TRACE_DECODE_IDX,
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/* Trace insn extraction.
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??? This is more of a simulator debugging operation and might best be
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moved to --debug-extract. */
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TRACE_EXTRACT_IDX,
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/* Trace insn execution but include line numbers. */
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TRACE_LINENUM_IDX,
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/* Trace memory operations.
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The difference between this and TRACE_CORE_IDX is (I think) that this
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is intended to apply to a higher level. TRACE_CORE_IDX applies to the
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low level core operations. */
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TRACE_MEMORY_IDX,
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/* Include model performance data in tracing output. */
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TRACE_MODEL_IDX,
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/* Trace ALU operations. */
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TRACE_ALU_IDX,
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/* Trace memory core operations. */
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TRACE_CORE_IDX,
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/* Trace events. */
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TRACE_EVENTS_IDX,
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/* Trace fpu operations. */
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TRACE_FPU_IDX,
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/* Trace vpu operations. */
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TRACE_VPU_IDX,
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/* Trace branching. */
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TRACE_BRANCH_IDX,
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/* Add information useful for debugging the simulator to trace output. */
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TRACE_DEBUG_IDX,
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/* Simulator specific trace bits begin here. */
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TRACE_NEXT_IDX,
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};
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/* Maximum number of traceable entities. */
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#ifndef MAX_TRACE_VALUES
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#define MAX_TRACE_VALUES 32
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#endif
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/* The -t option only prints useful values. It's easy to type and shouldn't
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splat on the screen everything under the sun making nothing easy to
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find. */
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#define TRACE_USEFUL_MASK \
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((1 << TRACE_INSN_IDX) \
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| (1 << TRACE_LINENUM_IDX) \
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| (1 << TRACE_MEMORY_IDX) \
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| (1 << TRACE_MODEL_IDX))
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/* Masks so WITH_TRACE can have symbolic values.
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The case choice here is on purpose. The lowercase parts are args to
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--with-trace. */
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#define TRACE_insn (1 << TRACE_INSN_IDX)
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#define TRACE_decode (1 << TRACE_DECODE_IDX)
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#define TRACE_extract (1 << TRACE_EXTRACT_IDX)
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#define TRACE_linenum (1 << TRACE_LINENUM_IDX)
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#define TRACE_memory (1 << TRACE_MEMORY_IDX)
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#define TRACE_model (1 << TRACE_MODEL_IDX)
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#define TRACE_alu (1 << TRACE_ALU_IDX)
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#define TRACE_core (1 << TRACE_CORE_IDX)
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#define TRACE_events (1 << TRACE_EVENTS_IDX)
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#define TRACE_fpu (1 << TRACE_FPU_IDX)
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#define TRACE_vpu (1 << TRACE_VPU_IDX)
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#define TRACE_branch (1 << TRACE_BRANCH_IDX)
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#define TRACE_debug (1 << TRACE_DEBUG_IDX)
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/* Preprocessor macros to simplify tests of WITH_TRACE. */
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#define WITH_TRACE_INSN_P (WITH_TRACE & TRACE_insn)
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#define WITH_TRACE_DECODE_P (WITH_TRACE & TRACE_decode)
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#define WITH_TRACE_EXTRACT_P (WITH_TRACE & TRACE_extract)
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#define WITH_TRACE_LINENUM_P (WITH_TRACE & TRACE_linenum)
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#define WITH_TRACE_MEMORY_P (WITH_TRACE & TRACE_memory)
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#define WITH_TRACE_MODEL_P (WITH_TRACE & TRACE_model)
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#define WITH_TRACE_ALU_P (WITH_TRACE & TRACE_alu)
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#define WITH_TRACE_CORE_P (WITH_TRACE & TRACE_core)
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#define WITH_TRACE_EVENTS_P (WITH_TRACE & TRACE_events)
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#define WITH_TRACE_FPU_P (WITH_TRACE & TRACE_fpu)
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#define WITH_TRACE_VPU_P (WITH_TRACE & TRACE_vpu)
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#define WITH_TRACE_BRANCH_P (WITH_TRACE & TRACE_branch)
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#define WITH_TRACE_DEBUG_P (WITH_TRACE & TRACE_debug)
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/* Tracing install handler. */
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MODULE_INSTALL_FN trace_install;
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/* Struct containing all system and cpu trace data.
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System trace data is stored with the associated module.
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System and cpu tracing must share the same space of bitmasks as they
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are arguments to --with-trace. One could have --with-trace and
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--with-cpu-trace or some such but that's an over-complication at this point
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in time. Also, there may be occasions where system and cpu tracing may
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wish to share a name. */
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typedef struct _trace_data {
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/* Global summary of all the current trace options */
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char trace_any_p;
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/* Boolean array of specified tracing flags. */
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/* ??? It's not clear that using an array vs a bit mask is faster.
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Consider the case where one wants to test whether any of several bits
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are set. */
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char trace_flags[MAX_TRACE_VALUES];
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#define TRACE_FLAGS(t) ((t)->trace_flags)
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/* Tracing output goes to this or stderr if NULL.
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We can't store `stderr' here as stderr goes through a callback. */
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FILE *trace_file;
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#define TRACE_FILE(t) ((t)->trace_file)
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/* Buffer to store the prefix to be printed before any trace line. */
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char trace_prefix[256];
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#define TRACE_PREFIX(t) ((t)->trace_prefix)
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/* Buffer to save the inputs for the current instruction. Use a
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union to force the buffer into correct alignment */
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union {
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unsigned8 i8;
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unsigned16 i16;
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unsigned32 i32;
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unsigned64 i64;
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} trace_input_data[16];
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unsigned8 trace_input_fmt[16];
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unsigned8 trace_input_size[16];
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int trace_input_idx;
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#define TRACE_INPUT_DATA(t) ((t)->trace_input_data)
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#define TRACE_INPUT_FMT(t) ((t)->trace_input_fmt)
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#define TRACE_INPUT_SIZE(t) ((t)->trace_input_size)
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#define TRACE_INPUT_IDX(t) ((t)->trace_input_idx)
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/* Category of trace being performed */
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int trace_idx;
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#define TRACE_IDX(t) ((t)->trace_idx)
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/* Trace range.
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??? Not all cpu's support this. */
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ADDR_RANGE range;
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#define TRACE_RANGE(t) (& (t)->range)
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} TRACE_DATA;
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/* System tracing support. */
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#define STATE_TRACE_FLAGS(sd) TRACE_FLAGS (STATE_TRACE_DATA (sd))
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/* Return non-zero if tracing of IDX is enabled for non-cpu specific
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components. The "S" in "STRACE" refers to "System". */
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#define STRACE_P(sd,idx) \
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((WITH_TRACE & (1 << (idx))) != 0 \
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&& STATE_TRACE_FLAGS (sd)[idx] != 0)
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/* Non-zero if --trace-<xxxx> was specified for SD. */
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#define STRACE_DEBUG_P(sd) STRACE_P (sd, TRACE_DEBUG_IDX)
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/* CPU tracing support. */
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#define CPU_TRACE_FLAGS(cpu) TRACE_FLAGS (CPU_TRACE_DATA (cpu))
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/* Return non-zero if tracing of IDX is enabled for CPU. */
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#define TRACE_P(cpu,idx) \
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((WITH_TRACE & (1 << (idx))) != 0 \
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&& CPU_TRACE_FLAGS (cpu)[idx] != 0)
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/* Non-zero if --trace-<xxxx> was specified for CPU. */
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#define TRACE_ANY_P(cpu) ((WITH_TRACE) && (CPU_TRACE_DATA (cpu)->trace_any_p))
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#define TRACE_INSN_P(cpu) TRACE_P (cpu, TRACE_INSN_IDX)
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#define TRACE_DECODE_P(cpu) TRACE_P (cpu, TRACE_DECODE_IDX)
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#define TRACE_EXTRACT_P(cpu) TRACE_P (cpu, TRACE_EXTRACT_IDX)
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#define TRACE_LINENUM_P(cpu) TRACE_P (cpu, TRACE_LINENUM_IDX)
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#define TRACE_MEMORY_P(cpu) TRACE_P (cpu, TRACE_MEMORY_IDX)
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#define TRACE_MODEL_P(cpu) TRACE_P (cpu, TRACE_MODEL_IDX)
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#define TRACE_ALU_P(cpu) TRACE_P (cpu, TRACE_ALU_IDX)
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#define TRACE_CORE_P(cpu) TRACE_P (cpu, TRACE_CORE_IDX)
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#define TRACE_EVENTS_P(cpu) TRACE_P (cpu, TRACE_EVENTS_IDX)
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#define TRACE_FPU_P(cpu) TRACE_P (cpu, TRACE_FPU_IDX)
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#define TRACE_VPU_P(cpu) TRACE_P (cpu, TRACE_VPU_IDX)
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#define TRACE_BRANCH_P(cpu) TRACE_P (cpu, TRACE_BRANCH_IDX)
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#define TRACE_DEBUG_P(cpu) TRACE_P (cpu, TRACE_DEBUG_IDX)
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/* Tracing functions. */
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/* Prime the trace buffers ready for any trace output.
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Must be called prior to any other trace operation */
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extern void trace_prefix PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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sim_cia cia,
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address_word pc,
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int print_linenum_p,
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const char *file_name,
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int line_nr,
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const char *fmt,
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...))
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__attribute__((format (printf, 8, 9)));
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/* Generic trace print, assumes trace_prefix() has been called */
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extern void trace_generic PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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const char *fmt,
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...))
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__attribute__((format (printf, 4, 5)));
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/* Trace a varying number of word sized inputs/outputs. trace_result*
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must be called to close the trace operation. */
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extern void trace_input0 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx));
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extern void trace_input_word1 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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unsigned_word d0));
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| 257 |
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extern void trace_input_word2 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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unsigned_word d0,
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unsigned_word d1));
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| 263 |
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extern void trace_input_word3 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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unsigned_word d0,
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unsigned_word d1,
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unsigned_word d2));
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extern void trace_input_word4 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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unsigned_word d0,
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unsigned_word d1,
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unsigned_word d2,
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unsigned_word d3));
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extern void trace_input_addr1 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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address_word d0));
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| 283 |
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extern void trace_input_bool1 PARAMS ((SIM_DESC sd,
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| 284 |
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sim_cpu *cpu,
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int trace_idx,
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int d0));
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| 288 |
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extern void trace_input_fp1 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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fp_word f0));
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| 293 |
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extern void trace_input_fp2 PARAMS ((SIM_DESC sd,
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| 294 |
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sim_cpu *cpu,
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| 295 |
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int trace_idx,
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fp_word f0,
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fp_word f1));
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| 299 |
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extern void trace_input_fp3 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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fp_word f0,
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fp_word f1,
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fp_word f2));
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| 306 |
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extern void trace_input_fpu1 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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struct _sim_fpu *f0));
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| 311 |
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extern void trace_input_fpu2 PARAMS ((SIM_DESC sd,
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sim_cpu *cpu,
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int trace_idx,
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struct _sim_fpu *f0,
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struct _sim_fpu *f1));
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extern void trace_input_fpu3 PARAMS ((SIM_DESC sd,
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| 318 |
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sim_cpu *cpu,
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int trace_idx,
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struct _sim_fpu *f0,
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struct _sim_fpu *f1,
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struct _sim_fpu *f2));
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| 324 |
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/* Other trace_input{_<fmt><nr-inputs>} functions can go here */
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| 326 |
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extern void trace_result0 PARAMS ((SIM_DESC sd,
|
| 327 |
|
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sim_cpu *cpu,
|
| 328 |
|
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int trace_idx));
|
| 329 |
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|
| 330 |
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extern void trace_result_word1 PARAMS ((SIM_DESC sd,
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| 331 |
|
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sim_cpu *cpu,
|
| 332 |
|
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int trace_idx,
|
| 333 |
|
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unsigned_word r0));
|
| 334 |
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|
| 335 |
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extern void trace_result_word2 PARAMS ((SIM_DESC sd,
|
| 336 |
|
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sim_cpu *cpu,
|
| 337 |
|
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int trace_idx,
|
| 338 |
|
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unsigned_word r0,
|
| 339 |
|
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unsigned_word r1));
|
| 340 |
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|
| 341 |
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extern void trace_result_word4 PARAMS ((SIM_DESC sd,
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| 342 |
|
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sim_cpu *cpu,
|
| 343 |
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int trace_idx,
|
| 344 |
|
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unsigned_word r0,
|
| 345 |
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unsigned_word r1,
|
| 346 |
|
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unsigned_word r2,
|
| 347 |
|
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unsigned_word r3));
|
| 348 |
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|
| 349 |
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extern void trace_result_bool1 PARAMS ((SIM_DESC sd,
|
| 350 |
|
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sim_cpu *cpu,
|
| 351 |
|
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int trace_idx,
|
| 352 |
|
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int r0));
|
| 353 |
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|
| 354 |
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extern void trace_result_addr1 PARAMS ((SIM_DESC sd,
|
| 355 |
|
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sim_cpu *cpu,
|
| 356 |
|
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int trace_idx,
|
| 357 |
|
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address_word r0));
|
| 358 |
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|
| 359 |
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extern void trace_result_fp1 PARAMS ((SIM_DESC sd,
|
| 360 |
|
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sim_cpu *cpu,
|
| 361 |
|
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int trace_idx,
|
| 362 |
|
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fp_word f0));
|
| 363 |
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|
| 364 |
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extern void trace_result_fp2 PARAMS ((SIM_DESC sd,
|
| 365 |
|
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sim_cpu *cpu,
|
| 366 |
|
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int trace_idx,
|
| 367 |
|
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fp_word f0,
|
| 368 |
|
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fp_word f1));
|
| 369 |
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|
| 370 |
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extern void trace_result_fpu1 PARAMS ((SIM_DESC sd,
|
| 371 |
|
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sim_cpu *cpu,
|
| 372 |
|
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int trace_idx,
|
| 373 |
|
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struct _sim_fpu *f0));
|
| 374 |
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|
| 375 |
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extern void trace_result_string1 PARAMS ((SIM_DESC sd,
|
| 376 |
|
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sim_cpu *cpu,
|
| 377 |
|
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int trace_idx,
|
| 378 |
|
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char *str0));
|
| 379 |
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|
| 380 |
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extern void trace_result_word1_string1 PARAMS ((SIM_DESC sd,
|
| 381 |
|
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sim_cpu *cpu,
|
| 382 |
|
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int trace_idx,
|
| 383 |
|
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unsigned_word r0,
|
| 384 |
|
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char *s0));
|
| 385 |
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|
| 386 |
|
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/* Other trace_result{_<type><nr-results>} */
|
| 387 |
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|
| 388 |
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|
| 389 |
|
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/* Macros for tracing ALU instructions */
|
| 390 |
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|
| 391 |
|
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#define TRACE_ALU_INPUT0() \
|
| 392 |
|
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do { \
|
| 393 |
|
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if (TRACE_ALU_P (CPU)) \
|
| 394 |
|
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trace_input0 (SD, CPU, TRACE_ALU_IDX); \
|
| 395 |
|
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} while (0)
|
| 396 |
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|
| 397 |
|
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#define TRACE_ALU_INPUT1(V0) \
|
| 398 |
|
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do { \
|
| 399 |
|
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if (TRACE_ALU_P (CPU)) \
|
| 400 |
|
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trace_input_word1 (SD, CPU, TRACE_ALU_IDX, (V0)); \
|
| 401 |
|
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} while (0)
|
| 402 |
|
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|
| 403 |
|
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#define TRACE_ALU_INPUT2(V0,V1) \
|
| 404 |
|
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do { \
|
| 405 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 406 |
|
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trace_input_word2 (SD, CPU, TRACE_ALU_IDX, (V0), (V1)); \
|
| 407 |
|
|
} while (0)
|
| 408 |
|
|
|
| 409 |
|
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#define TRACE_ALU_INPUT3(V0,V1,V2) \
|
| 410 |
|
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do { \
|
| 411 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 412 |
|
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trace_input_word3 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2)); \
|
| 413 |
|
|
} while (0)
|
| 414 |
|
|
|
| 415 |
|
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#define TRACE_ALU_INPUT4(V0,V1,V2,V3) \
|
| 416 |
|
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do { \
|
| 417 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 418 |
|
|
trace_input_word4 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2), (V3)); \
|
| 419 |
|
|
} while (0)
|
| 420 |
|
|
|
| 421 |
|
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#define TRACE_ALU_RESULT(R0) TRACE_ALU_RESULT1(R0)
|
| 422 |
|
|
|
| 423 |
|
|
#define TRACE_ALU_RESULT0() \
|
| 424 |
|
|
do { \
|
| 425 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 426 |
|
|
trace_result0 (SD, CPU, TRACE_ALU_IDX); \
|
| 427 |
|
|
} while (0)
|
| 428 |
|
|
|
| 429 |
|
|
#define TRACE_ALU_RESULT1(R0) \
|
| 430 |
|
|
do { \
|
| 431 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 432 |
|
|
trace_result_word1 (SD, CPU, TRACE_ALU_IDX, (R0)); \
|
| 433 |
|
|
} while (0)
|
| 434 |
|
|
|
| 435 |
|
|
#define TRACE_ALU_RESULT2(R0,R1) \
|
| 436 |
|
|
do { \
|
| 437 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 438 |
|
|
trace_result_word2 (SD, CPU, TRACE_ALU_IDX, (R0), (R1)); \
|
| 439 |
|
|
} while (0)
|
| 440 |
|
|
|
| 441 |
|
|
#define TRACE_ALU_RESULT4(R0,R1,R2,R3) \
|
| 442 |
|
|
do { \
|
| 443 |
|
|
if (TRACE_ALU_P (CPU)) \
|
| 444 |
|
|
trace_result_word4 (SD, CPU, TRACE_ALU_IDX, (R0), (R1), (R2), (R3)); \
|
| 445 |
|
|
} while (0)
|
| 446 |
|
|
|
| 447 |
|
|
/* Macros for tracing inputs to comparative branch instructions. */
|
| 448 |
|
|
|
| 449 |
|
|
#define TRACE_BRANCH_INPUT1(V0) \
|
| 450 |
|
|
do { \
|
| 451 |
|
|
if (TRACE_BRANCH_P (CPU)) \
|
| 452 |
|
|
trace_input_word1 (SD, CPU, TRACE_BRANCH_IDX, (V0)); \
|
| 453 |
|
|
} while (0)
|
| 454 |
|
|
|
| 455 |
|
|
#define TRACE_BRANCH_INPUT2(V0,V1) \
|
| 456 |
|
|
do { \
|
| 457 |
|
|
if (TRACE_BRANCH_P (CPU)) \
|
| 458 |
|
|
trace_input_word2 (SD, CPU, TRACE_BRANCH_IDX, (V0), (V1)); \
|
| 459 |
|
|
} while (0)
|
| 460 |
|
|
|
| 461 |
|
|
/* Macros for tracing FPU instructions */
|
| 462 |
|
|
|
| 463 |
|
|
#define TRACE_FP_INPUT0() \
|
| 464 |
|
|
do { \
|
| 465 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 466 |
|
|
trace_input0 (SD, CPU, TRACE_FPU_IDX); \
|
| 467 |
|
|
} while (0)
|
| 468 |
|
|
|
| 469 |
|
|
#define TRACE_FP_INPUT1(V0) \
|
| 470 |
|
|
do { \
|
| 471 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 472 |
|
|
trace_input_fp1 (SD, CPU, TRACE_FPU_IDX, (V0)); \
|
| 473 |
|
|
} while (0)
|
| 474 |
|
|
|
| 475 |
|
|
#define TRACE_FP_INPUT2(V0,V1) \
|
| 476 |
|
|
do { \
|
| 477 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 478 |
|
|
trace_input_fp2 (SD, CPU, TRACE_FPU_IDX, (V0), (V1)); \
|
| 479 |
|
|
} while (0)
|
| 480 |
|
|
|
| 481 |
|
|
#define TRACE_FP_INPUT3(V0,V1,V2) \
|
| 482 |
|
|
do { \
|
| 483 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 484 |
|
|
trace_input_fp3 (SD, CPU, TRACE_FPU_IDX, (V0), (V1), (V2)); \
|
| 485 |
|
|
} while (0)
|
| 486 |
|
|
|
| 487 |
|
|
#define TRACE_FP_INPUT_WORD1(V0) \
|
| 488 |
|
|
do { \
|
| 489 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 490 |
|
|
trace_input_word1 (SD, CPU, TRACE_FPU_IDX, (V0)); \
|
| 491 |
|
|
} while (0)
|
| 492 |
|
|
|
| 493 |
|
|
#define TRACE_FP_RESULT(R0) \
|
| 494 |
|
|
do { \
|
| 495 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 496 |
|
|
trace_result_fp1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
|
| 497 |
|
|
} while (0)
|
| 498 |
|
|
|
| 499 |
|
|
#define TRACE_FP_RESULT2(R0,R1) \
|
| 500 |
|
|
do { \
|
| 501 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 502 |
|
|
trace_result_fp2 (SD, CPU, TRACE_FPU_IDX, (R0), (R1)); \
|
| 503 |
|
|
} while (0)
|
| 504 |
|
|
|
| 505 |
|
|
#define TRACE_FP_RESULT_BOOL(R0) \
|
| 506 |
|
|
do { \
|
| 507 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 508 |
|
|
trace_result_bool1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
|
| 509 |
|
|
} while (0)
|
| 510 |
|
|
|
| 511 |
|
|
#define TRACE_FP_RESULT_WORD(R0) \
|
| 512 |
|
|
do { \
|
| 513 |
|
|
if (TRACE_FPU_P (CPU)) \
|
| 514 |
|
|
trace_result_word1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
|
| 515 |
|
|
} while (0)
|
| 516 |
|
|
|
| 517 |
|
|
|
| 518 |
|
|
/* Macros for tracing branches */
|
| 519 |
|
|
|
| 520 |
|
|
#define TRACE_BRANCH_INPUT(COND) \
|
| 521 |
|
|
do { \
|
| 522 |
|
|
if (TRACE_BRANCH_P (CPU)) \
|
| 523 |
|
|
trace_input_bool1 (SD, CPU, TRACE_BRANCH_IDX, (COND)); \
|
| 524 |
|
|
} while (0)
|
| 525 |
|
|
|
| 526 |
|
|
#define TRACE_BRANCH_RESULT(DEST) \
|
| 527 |
|
|
do { \
|
| 528 |
|
|
if (TRACE_BRANCH_P (CPU)) \
|
| 529 |
|
|
trace_result_addr1 (SD, CPU, TRACE_BRANCH_IDX, (DEST)); \
|
| 530 |
|
|
} while (0)
|
| 531 |
|
|
|
| 532 |
|
|
|
| 533 |
|
|
/* The function trace_one_insn has been replaced by the function pair
|
| 534 |
|
|
trace_prefix() + trace_generic() */
|
| 535 |
|
|
extern void trace_one_insn PARAMS ((SIM_DESC sd,
|
| 536 |
|
|
sim_cpu * cpu,
|
| 537 |
|
|
address_word cia,
|
| 538 |
|
|
int print_linenum_p,
|
| 539 |
|
|
const char *file_name,
|
| 540 |
|
|
int line_nr,
|
| 541 |
|
|
const char *unit,
|
| 542 |
|
|
const char *fmt,
|
| 543 |
|
|
...))
|
| 544 |
|
|
__attribute__((format (printf, 8, 9)));
|
| 545 |
|
|
|
| 546 |
|
|
extern void trace_printf PARAMS ((SIM_DESC, sim_cpu *, const char *, ...))
|
| 547 |
|
|
__attribute__((format (printf, 3, 4)));
|
| 548 |
|
|
|
| 549 |
|
|
extern void trace_vprintf PARAMS ((SIM_DESC, sim_cpu *, const char *, va_list));
|
| 550 |
|
|
|
| 551 |
|
|
/* Debug support.
|
| 552 |
|
|
This is included here because there isn't enough of it to justify
|
| 553 |
|
|
a sim-debug.h. */
|
| 554 |
|
|
|
| 555 |
|
|
/* Return non-zero if debugging of IDX for CPU is enabled. */
|
| 556 |
|
|
#define DEBUG_P(cpu, idx) \
|
| 557 |
|
|
((WITH_DEBUG & (1 << (idx))) != 0 \
|
| 558 |
|
|
&& CPU_DEBUG_FLAGS (cpu)[idx] != 0)
|
| 559 |
|
|
|
| 560 |
|
|
/* Non-zero if "--debug-insn" specified. */
|
| 561 |
|
|
#define DEBUG_INSN_P(cpu) DEBUG_P (cpu, DEBUG_INSN_IDX)
|
| 562 |
|
|
|
| 563 |
|
|
extern void debug_printf PARAMS ((sim_cpu *, const char *, ...))
|
| 564 |
|
|
__attribute__((format (printf, 2, 3)));
|
| 565 |
|
|
|
| 566 |
|
|
#endif /* SIM_TRACE_H */
|
