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jlechner |
# Makefile template for Configure for the MIPS simulator.
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# Written by Cygnus Support.
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SHELL = @SHELL@
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## COMMON_PRE_CONFIG_FRAG
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srcdir=@srcdir@
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srcroot=$(srcdir)/../../
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# Object files created by various simulator generators.
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SIM_IGEN_OBJ = \
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support.o \
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itable.o \
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semantics.o \
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idecode.o \
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icache.o \
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@mips_igen_engine@ \
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irun.o \
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SIM_M16_OBJ = \
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m16_support.o \
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m16_semantics.o \
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m16_idecode.o \
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m16_icache.o \
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\
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m32_support.o \
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m32_semantics.o \
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m32_idecode.o \
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m32_icache.o \
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\
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itable.o \
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m16run.o \
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SIM_MULTI_OBJ = itable.o @sim_multi_obj@
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MIPS_EXTRA_OBJS = @mips_extra_objs@
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MIPS_EXTRA_LIBS = @mips_extra_libs@
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SIM_OBJS = \
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$(SIM_@sim_gen@_OBJ) \
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$(SIM_NEW_COMMON_OBJS) \
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$(MIPS_EXTRA_OBJS) \
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cp1.o \
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interp.o \
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mdmx.o \
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dsp.o \
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sim-main.o \
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sim-hload.o \
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sim-engine.o \
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sim-stop.o \
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sim-resume.o \
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sim-reason.o \
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# List of flags to always pass to $(CC).
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SIM_SUBTARGET=@SIM_SUBTARGET@
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SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
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SIM_EXTRA_CLEAN = clean-extra
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SIM_EXTRA_DISTCLEAN = distclean-extra
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SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
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SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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## COMMON_POST_CONFIG_FRAG
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interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
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cp1.o: $(srcdir)/cp1.c config.h sim-main.h
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mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
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dsp.o: $(srcdir)/dsp.c $(srcdir)/sim-main.h
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multi-run.o: multi-include.h tmp-mach-multi
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../igen/igen:
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cd ../igen && $(MAKE)
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IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
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IGEN_INSN=$(srcdir)/mips.igen
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IGEN_DC=$(srcdir)/mips.dc
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M16_DC=$(srcdir)/m16.dc
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IGEN_INCLUDE=\
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$(srcdir)/m16.igen \
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$(srcdir)/m16e.igen \
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$(srcdir)/mdmx.igen \
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$(srcdir)/mips3d.igen \
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$(srcdir)/sb1.igen \
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$(srcdir)/tx.igen \
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$(srcdir)/vr.igen \
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$(srcdir)/dsp.igen \
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$(srcdir)/dsp2.igen \
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$(srcdir)/mips3264r2.igen \
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# NB: Since these can be built by a number of generators, care
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# must be taken to ensure that they are only dependant on
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# one of those generators.
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BUILT_SRC_FROM_GEN = \
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itable.h \
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itable.c \
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SIM_IGEN_ALL = tmp-igen
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SIM_M16_ALL = tmp-m16
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SIM_MULTI_ALL = tmp-multi
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$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
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BUILT_SRC_FROM_IGEN = \
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icache.h \
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icache.c \
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idecode.h \
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idecode.c \
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semantics.h \
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semantics.c \
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model.h \
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model.c \
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support.h \
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support.c \
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engine.h \
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engine.c \
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irun.c \
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$(BUILT_SRC_FROM_IGEN): tmp-igen
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tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
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cd ../igen && $(MAKE)
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../igen/igen \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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@sim_igen_flags@ \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-x \
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-n icache.h -hc tmp-icache.h \
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-n icache.c -c tmp-icache.c \
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-n semantics.h -hs tmp-semantics.h \
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-n semantics.c -s tmp-semantics.c \
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-n idecode.h -hd tmp-idecode.h \
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-n idecode.c -d tmp-idecode.c \
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-n model.h -hm tmp-model.h \
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-n model.c -m tmp-model.c \
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-n support.h -hf tmp-support.h \
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-n support.c -f tmp-support.c \
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-n itable.h -ht tmp-itable.h \
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-n itable.c -t tmp-itable.c \
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-n engine.h -he tmp-engine.h \
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-n engine.c -e tmp-engine.c \
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-n irun.c -r tmp-irun.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
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touch tmp-igen
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semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
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engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
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support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
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idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
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itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
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m16run.o: sim-main.h m16_idecode.h m32_idecode.h $(SIM_EXTRA_DEPS)
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m16_semantics.o: sim-main.h m16_semantics.c $(SIM_EXTRA_DEPS)
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m16_support.o: sim-main.h m16_support.c $(SIM_EXTRA_DEPS)
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m16_idecode.o: sim-main.h m16_idecode.c $(SIM_EXTRA_DEPS)
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m16_icache.o: sim-main.h m16_icache.c $(SIM_EXTRA_DEPS)
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m32_semantics.o: sim-main.h m32_semantics.c $(SIM_EXTRA_DEPS)
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m32_support.o: sim-main.h m32_support.c $(SIM_EXTRA_DEPS)
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m32_idecode.o: sim-main.h m32_idecode.c $(SIM_EXTRA_DEPS)
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m32_icache.o: sim-main.h m32_icache.c $(SIM_EXTRA_DEPS)
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BUILT_SRC_FROM_M16 = \
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m16_icache.h \
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m16_icache.c \
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m16_idecode.h \
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m16_idecode.c \
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m16_semantics.h \
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m16_semantics.c \
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m16_model.h \
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m16_model.c \
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m16_support.h \
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m16_support.c \
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\
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m32_icache.h \
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m32_icache.c \
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m32_idecode.h \
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m32_idecode.c \
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m32_semantics.h \
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m32_semantics.c \
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m32_model.h \
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m32_model.c \
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m32_support.h \
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m32_support.c \
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$(BUILT_SRC_FROM_M16): tmp-m16
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tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
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cd ../igen && $(MAKE)
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../igen/igen \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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@sim_m16_flags@ \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 16 \
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-H 15 \
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-i $(IGEN_INSN) \
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-o $(M16_DC) \
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-P m16_ \
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-x \
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-n m16_icache.h -hc tmp-icache.h \
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-n m16_icache.c -c tmp-icache.c \
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-n m16_semantics.h -hs tmp-semantics.h \
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-n m16_semantics.c -s tmp-semantics.c \
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-n m16_idecode.h -hd tmp-idecode.h \
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| 247 |
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-n m16_idecode.c -d tmp-idecode.c \
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| 248 |
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-n m16_model.h -hm tmp-model.h \
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| 249 |
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-n m16_model.c -m tmp-model.c \
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| 250 |
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-n m16_support.h -hf tmp-support.h \
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-n m16_support.c -f tmp-support.c \
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#
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
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| 254 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
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| 255 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
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| 256 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
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| 257 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
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| 258 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
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| 259 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
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| 260 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
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| 261 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
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| 262 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
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| 263 |
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../igen/igen \
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| 264 |
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$(IGEN_TRACE) \
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| 265 |
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-I $(srcdir) \
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| 266 |
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-Werror \
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| 267 |
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-Wnodiscard \
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| 268 |
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@sim_igen_flags@ \
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| 269 |
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-G gen-direct-access \
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| 270 |
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-G gen-zero-r0 \
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| 271 |
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-B 32 \
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| 272 |
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-H 31 \
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| 273 |
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-i $(IGEN_INSN) \
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| 274 |
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-o $(IGEN_DC) \
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| 275 |
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-P m32_ \
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| 276 |
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-x \
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| 277 |
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-n m32_icache.h -hc tmp-icache.h \
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| 278 |
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-n m32_icache.c -c tmp-icache.c \
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| 279 |
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-n m32_semantics.h -hs tmp-semantics.h \
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| 280 |
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-n m32_semantics.c -s tmp-semantics.c \
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| 281 |
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-n m32_idecode.h -hd tmp-idecode.h \
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| 282 |
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-n m32_idecode.c -d tmp-idecode.c \
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| 283 |
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-n m32_model.h -hm tmp-model.h \
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| 284 |
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-n m32_model.c -m tmp-model.c \
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| 285 |
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-n m32_support.h -hf tmp-support.h \
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| 286 |
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-n m32_support.c -f tmp-support.c \
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| 287 |
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#
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| 288 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
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| 289 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
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| 290 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
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| 291 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
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| 292 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
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| 293 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
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| 294 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
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| 295 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
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| 296 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
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| 297 |
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
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| 298 |
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../igen/igen \
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| 299 |
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$(IGEN_TRACE) \
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| 300 |
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-I $(srcdir) \
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| 301 |
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-Werror \
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| 302 |
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-Wnodiscard \
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| 303 |
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-Wnowidth \
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| 304 |
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@sim_igen_flags@ @sim_m16_flags@ \
|
| 305 |
|
|
-G gen-direct-access \
|
| 306 |
|
|
-G gen-zero-r0 \
|
| 307 |
|
|
-i $(IGEN_INSN) \
|
| 308 |
|
|
-n itable.h -ht tmp-itable.h \
|
| 309 |
|
|
-n itable.c -t tmp-itable.c \
|
| 310 |
|
|
#
|
| 311 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
|
| 312 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
|
| 313 |
|
|
touch tmp-m16
|
| 314 |
|
|
|
| 315 |
|
|
|
| 316 |
|
|
BUILT_SRC_FROM_MULTI = @sim_multi_src@
|
| 317 |
|
|
SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
|
| 318 |
|
|
|
| 319 |
|
|
$(BUILT_SRC_FROM_MULTI): tmp-multi
|
| 320 |
|
|
tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
|
| 321 |
|
|
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
|
| 322 |
|
|
for t in $(SIM_MULTI_IGEN_CONFIGS); do \
|
| 323 |
|
|
p=`echo $${t} | sed -e 's/:.*//'` ; \
|
| 324 |
|
|
m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
|
| 325 |
|
|
f=`echo $${t} | sed -e 's/.*://'` ; \
|
| 326 |
|
|
case $${p} in \
|
| 327 |
|
|
m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
|
| 328 |
|
|
*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
|
| 329 |
|
|
esac; \
|
| 330 |
|
|
../igen/igen \
|
| 331 |
|
|
$(IGEN_TRACE) \
|
| 332 |
|
|
$${e} \
|
| 333 |
|
|
-I $(srcdir) \
|
| 334 |
|
|
-Werror \
|
| 335 |
|
|
-Wnodiscard \
|
| 336 |
|
|
-N 0 \
|
| 337 |
|
|
-M $${m} \
|
| 338 |
|
|
-G gen-direct-access \
|
| 339 |
|
|
-G gen-zero-r0 \
|
| 340 |
|
|
-i $(IGEN_INSN) \
|
| 341 |
|
|
-P $${p}_ \
|
| 342 |
|
|
-x \
|
| 343 |
|
|
-n $${p}_icache.h -hc tmp-icache.h \
|
| 344 |
|
|
-n $${p}_icache.c -c tmp-icache.c \
|
| 345 |
|
|
-n $${p}_semantics.h -hs tmp-semantics.h \
|
| 346 |
|
|
-n $${p}_semantics.c -s tmp-semantics.c \
|
| 347 |
|
|
-n $${p}_idecode.h -hd tmp-idecode.h \
|
| 348 |
|
|
-n $${p}_idecode.c -d tmp-idecode.c \
|
| 349 |
|
|
-n $${p}_model.h -hm tmp-model.h \
|
| 350 |
|
|
-n $${p}_model.c -m tmp-model.c \
|
| 351 |
|
|
-n $${p}_support.h -hf tmp-support.h \
|
| 352 |
|
|
-n $${p}_support.c -f tmp-support.c \
|
| 353 |
|
|
-n $${p}_engine.h -he tmp-engine.h \
|
| 354 |
|
|
-n $${p}_engine.c -e tmp-engine.c \
|
| 355 |
|
|
; \
|
| 356 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
|
| 357 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
|
| 358 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
|
| 359 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
|
| 360 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
|
| 361 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
|
| 362 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
|
| 363 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
|
| 364 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
|
| 365 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
|
| 366 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
|
| 367 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
|
| 368 |
|
|
done
|
| 369 |
|
|
touch tmp-mach-multi
|
| 370 |
|
|
tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
|
| 371 |
|
|
../igen/igen \
|
| 372 |
|
|
$(IGEN_TRACE) \
|
| 373 |
|
|
-I $(srcdir) \
|
| 374 |
|
|
-Werror \
|
| 375 |
|
|
-Wnodiscard \
|
| 376 |
|
|
-Wnowidth \
|
| 377 |
|
|
-N 0 \
|
| 378 |
|
|
@sim_multi_flags@ \
|
| 379 |
|
|
-G gen-direct-access \
|
| 380 |
|
|
-G gen-zero-r0 \
|
| 381 |
|
|
-i $(IGEN_INSN) \
|
| 382 |
|
|
-n itable.h -ht tmp-itable.h \
|
| 383 |
|
|
-n itable.c -t tmp-itable.c \
|
| 384 |
|
|
#
|
| 385 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
|
| 386 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
|
| 387 |
|
|
touch tmp-itable-multi
|
| 388 |
|
|
tmp-run-multi: $(srcdir)/m16run.c
|
| 389 |
|
|
for t in $(SIM_MULTI_IGEN_CONFIGS); do \
|
| 390 |
|
|
case $${t} in \
|
| 391 |
|
|
m16*) \
|
| 392 |
|
|
m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
|
| 393 |
|
|
sed < $(srcdir)/m16run.c > tmp-run \
|
| 394 |
|
|
-e "s/^sim_/m16$${m}_/" \
|
| 395 |
|
|
-e "s/m16_/m16$${m}_/" \
|
| 396 |
|
|
-e "s/m32_/m32$${m}_/" ; \
|
| 397 |
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
|
| 398 |
|
|
esac \
|
| 399 |
|
|
done
|
| 400 |
|
|
touch tmp-run-multi
|
| 401 |
|
|
|
| 402 |
|
|
clean-extra:
|
| 403 |
|
|
rm -f $(BUILT_SRC_FROM_GEN)
|
| 404 |
|
|
rm -f $(BUILT_SRC_FROM_IGEN)
|
| 405 |
|
|
rm -f $(BUILT_SRC_FROM_M16)
|
| 406 |
|
|
rm -f $(BUILT_SRC_FROM_MULTI)
|
| 407 |
|
|
rm -f tmp-*
|
| 408 |
|
|
rm -f m16*.o m32*.o itable*.o
|
| 409 |
|
|
|
| 410 |
|
|
distclean-extra:
|
| 411 |
|
|
rm -f multi-include.h multi-run.c
|
