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# Intel(r) Wireless MMX(tm) technology testcase for TMIAxy
# mach: xscale
# as: -mcpu=xscale+iwmmxt
 
        .include "testutils.inc"
 
        start
 
        .global tmiaXY
tmiaXY:
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.
 
        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0
 
        # Test Bottom Bottom Multilply Accumulate
 
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0
 
        tmcrr      wr0, r0, r1
 
        tmiaBB     wr0, r2, r3
 
        tmrrc      r0, r1, wr0
 
        test_h_gr  r0, 0x05f753c4
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0
 
        # Test Bottom Top Multilply Accumulate
 
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0
 
        tmcrr      wr0, r0, r1
 
        tmiaBT     wr0, r2, r3
 
        tmrrc      r0, r1, wr0
 
        test_h_gr  r0, 0xeeede364
        test_h_gr  r1, 0x55667787
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0
 
        # Test Top Bottom Multilply Accumulate
 
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0
 
        tmcrr      wr0, r0, r1
 
        tmiaTB     wr0, r2, r3
 
        tmrrc      r0, r1, wr0
 
        test_h_gr  r0, 0x0ec85c04
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0
 
        # Test Top Top Multilply Accumulate
 
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0
 
        tmcrr      wr0, r0, r1
 
        tmiaTT     wr0, r2, r3
 
        tmrrc      r0, r1, wr0
 
        test_h_gr  r0, 0x09eed974
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# Intel(r) Wireless MMX(tm) technology testcase for TMIAxy`
2			`# mach: xscale`
3			`# as: -mcpu=xscale+iwmmxt`
4
5			`.include "testutils.inc"`
6
7			`start`
8
9			`.global tmiaXY`
10			`tmiaXY:`
11			`# Enable access to CoProcessors 0 & 1 before`
12			`# we attempt these instructions.`
13
14			`mvi_h_gr r1, 3`
15			`mcr p15, 0, r1, cr15, cr1, 0`
16
17			`# Test Bottom Bottom Multilply Accumulate`
18
19			`mvi_h_gr r0, 0x11223344`
20			`mvi_h_gr r1, 0x55667788`
21			`mvi_h_gr r2, 0x12345678`
22			`mvi_h_gr r3, 0x9abcdef0`
23
24			`tmcrr wr0, r0, r1`
25
26			`tmiaBB wr0, r2, r3`
27
28			`tmrrc r0, r1, wr0`
29
30			`test_h_gr r0, 0x05f753c4`
31			`test_h_gr r1, 0x55667788`
32			`test_h_gr r2, 0x12345678`
33			`test_h_gr r3, 0x9abcdef0`
34
35			`# Test Bottom Top Multilply Accumulate`
36
37			`mvi_h_gr r0, 0x11223344`
38			`mvi_h_gr r1, 0x55667788`
39			`mvi_h_gr r2, 0x12345678`
40			`mvi_h_gr r3, 0x9abcdef0`
41
42			`tmcrr wr0, r0, r1`
43
44			`tmiaBT wr0, r2, r3`
45
46			`tmrrc r0, r1, wr0`
47
48			`test_h_gr r0, 0xeeede364`
49			`test_h_gr r1, 0x55667787`
50			`test_h_gr r2, 0x12345678`
51			`test_h_gr r3, 0x9abcdef0`
52
53			`# Test Top Bottom Multilply Accumulate`
54
55			`mvi_h_gr r0, 0x11223344`
56			`mvi_h_gr r1, 0x55667788`
57			`mvi_h_gr r2, 0x12345678`
58			`mvi_h_gr r3, 0x9abcdef0`
59
60			`tmcrr wr0, r0, r1`
61
62			`tmiaTB wr0, r2, r3`
63
64			`tmrrc r0, r1, wr0`
65
66			`test_h_gr r0, 0x0ec85c04`
67			`test_h_gr r1, 0x55667788`
68			`test_h_gr r2, 0x12345678`
69			`test_h_gr r3, 0x9abcdef0`
70
71			`# Test Top Top Multilply Accumulate`
72
73			`mvi_h_gr r0, 0x11223344`
74			`mvi_h_gr r1, 0x55667788`
75			`mvi_h_gr r2, 0x12345678`
76			`mvi_h_gr r3, 0x9abcdef0`
77
78			`tmcrr wr0, r0, r1`
79
80			`tmiaTT wr0, r2, r3`
81
82			`tmrrc r0, r1, wr0`
83
84			`test_h_gr r0, 0x09eed974`
85			`test_h_gr r1, 0x55667788`
86			`test_h_gr r2, 0x12345678`
87			`test_h_gr r3, 0x9abcdef0`
88
89			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [tmiaxy.cgs] - Blame information for rev 26