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# XScale testcase for MAR and MRA
# mach: xscale
# as: -mcpu=xscale
 
        .include "testutils.inc"
 
        start
 
        .global mar_mra
mar_mra:
        mvi_h_gr   r2,0
        mvi_h_gr   r3,0
        mvi_h_gr   r4,0x0000EFA0
        mvi_h_gr   r5,0xA0A0A0A0
 
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.
 
        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0
 
        mar        acc0, r5, r4
        mra        r2, r3, acc0
 
        test_h_gr  r2,0xA0A0A0A0
        test_h_gr  r3,0x0000EFA0
        test_h_gr  r4,0x0000EFA0
        test_h_gr  r5,0xA0A0A0A0
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# XScale testcase for MAR and MRA`
2			`# mach: xscale`
3			`# as: -mcpu=xscale`
4
5			`.include "testutils.inc"`
6
7			`start`
8
9			`.global mar_mra`
10			`mar_mra:`
11			`mvi_h_gr r2,0`
12			`mvi_h_gr r3,0`
13			`mvi_h_gr r4,0x0000EFA0`
14			`mvi_h_gr r5,0xA0A0A0A0`
15
16			`# Enable access to CoProcessors 0 & 1 before`
17			`# we attempt these instructions.`
18
19			`mvi_h_gr r1, 3`
20			`mcr p15, 0, r1, cr15, cr1, 0`
21
22			`mar acc0, r5, r4`
23			`mra r2, r3, acc0`
24
25			`test_h_gr r2,0xA0A0A0A0`
26			`test_h_gr r3,0x0000EFA0`
27			`test_h_gr r4,0x0000EFA0`
28			`test_h_gr r5,0xA0A0A0A0`
29
30			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [xscale/] [mra.cgs] - Blame information for rev 26