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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movmp.ms] - Blame information for rev 26

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1 26 jlechner
# mach: crisv3 crisv8 crisv10 crisv32
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# output: ffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nffffff00\nffff0000\n0\nbb113344\n664433aa\ncc557788\nabcde012\nabcde000\n77880000\n0\n
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# Test generic "move Ps,[]" and "move [],Pd" insns; the ones with
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# functionality common to all models.
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 .include "testutils.inc"
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 start
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 .data
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filler:
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 .byte 0xaa
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 .word 0x4433
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 .dword 0x55778866
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 .byte 0xcc
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 .text
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; Test that writing to zero-registers is a nop
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 .if 0
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 ; We used to just ignore the writes, but now an error is emitted.  We
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 ; keep the test-code but disabled, in case we need to change this again.
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 move 0xaa,p0
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 move 0x4433,p4
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 move 0x55774433,p8
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 .endif
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 moveq -1,r3
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 setf zcvn
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 clear.b r3
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 test_cc 1 1 1 1
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 dumpr3
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 moveq -1,r3
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 clearf zcvn
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 clear.w r3
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 test_cc 0 0 0 0
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 dumpr3
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 moveq -1,r3
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 clear.d r3
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 dumpr3
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; "Write" using ordinary memory references too.
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 .if 0 ; See ".if 0" above.
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 move.d filler,r6
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 move [r6],p0
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 move [r6],p4
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 move [r6],p8
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 .endif
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 moveq -1,r3
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 clear.b r3
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 dumpr3
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 moveq -1,r3
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 clear.w r3
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 dumpr3
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 moveq -1,r3
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 clear.d r3
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 dumpr3
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; And postincremented.
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 .if 0 ; See ".if 0" above.
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 move [r6+],p0
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 move [r6+],p4
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 move [r6+],p8
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 .endif
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 moveq -1,r3
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 clear.b r3
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 dumpr3
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 moveq -1,r3
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 clear.w r3
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 dumpr3
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 moveq -1,r3
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 clear.d r3
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 dumpr3
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; Now see that we can write to the registers too.
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; [PC+]
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 move.d filler,r9
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 move 0xbb113344,srp
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 move srp,r3
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 dumpr3
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; [R+]
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 move [r9+],srp
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 move srp,r3
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 dumpr3
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; [R]
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 move [r9],srp
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 move srp,r3
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 dumpr3
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; And check writing to memory, clear and srp.
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 move.d filler,r9
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 move 0xabcde012,srp
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 setf zcvn
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 move srp,[r9+]
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 test_cc 1 1 1 1
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 subq 4,r9
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 move.d [r9],r3
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 dumpr3
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 clearf zcvn
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 clear.b [r9]
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 test_cc 0 0 0 0
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 move.d [r9],r3
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 dumpr3
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 addq 2,r9
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 clear.w [r9+]
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 subq 2,r9
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 move.d [r9],r3
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 dumpr3
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 clear.d [r9]
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 move.d [r9],r3
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 dumpr3
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 quit

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