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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movsm.ms] - Blame information for rev 26

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# mach: crisv3 crisv8 crisv10 crisv32
# output: 5\nfffffff5\n5\nfffffff5\n0\n
 
; Movs between registers.  Check that sign-extension is performed and the
; full register is set.
 
 .include "testutils.inc"
 
 .data
x:
 .byte 5,-11
 .word 5,-11
 .word 0
 
 start
 move.d x,r5
 
 moveq -1,r3
 movs.b [r5+],r3
 test_move_cc 0 0 0 0
 dumpr3
 
 moveq 0,r3
 movs.b [r5],r3
 test_move_cc 1 0 0 0
 addq 1,r5
 dumpr3
 
 moveq -1,r3
 movs.w [r5+],r3
 test_move_cc 0 0 0 0
 dumpr3
 
 moveq 0,r3
 movs.w [r5],r3
 test_move_cc 1 0 0 0
 addq 2,r5
 dumpr3
 
 movs.w [r5],r3
 test_move_cc 0 1 0 0
 dumpr3
 
 quit

Line No.	Rev	Author	Line
1	26	jlechner	`# mach: crisv3 crisv8 crisv10 crisv32`
2			`# output: 5\nfffffff5\n5\nfffffff5\n0\n`
3
4			`; Movs between registers. Check that sign-extension is performed and the`
5			`; full register is set.`
6
7			`.include "testutils.inc"`
8
9			`.data`
10			`x:`
11			`.byte 5,-11`
12			`.word 5,-11`
13			`.word 0`
14
15			`start`
16			`move.d x,r5`
17
18			`moveq -1,r3`
19			`movs.b [r5+],r3`
20			`test_move_cc 0 0 0 0`
21			`dumpr3`
22
23			`moveq 0,r3`
24			`movs.b [r5],r3`
25			`test_move_cc 1 0 0 0`
26			`addq 1,r5`
27			`dumpr3`
28
29			`moveq -1,r3`
30			`movs.w [r5+],r3`
31			`test_move_cc 0 0 0 0`
32			`dumpr3`
33
34			`moveq 0,r3`
35			`movs.w [r5],r3`
36			`test_move_cc 1 0 0 0`
37			`addq 2,r5`
38			`dumpr3`
39
40			`movs.w [r5],r3`
41			`test_move_cc 0 1 0 0`
42			`dumpr3`
43
44			`quit`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movsm.ms] - Blame information for rev 26