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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movum.ms] - Blame information for rev 26

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# mach: crisv3 crisv8 crisv10 crisv32
# output: 5\nf5\n5\nfff5\n0\n
 
; Movu between registers.  Check that zero-extension is performed and the
; full register is set.
 
 .include "testutils.inc"
 
 .data
x:
 .byte 5,-11
 .word 5,-11
 .word 0
 
 start
 move.d x,r5
 
 movu.b [r5+],r3
 test_move_cc 0 0 0 0
 dumpr3
 
 movu.b [r5],r3
 test_move_cc 0 0 0 0
 addq 1,r5
 dumpr3
 
 movu.w [r5+],r3
 test_move_cc 0 0 0 0
 dumpr3
 
 movu.w [r5],r3
 test_move_cc 0 0 0 0
 addq 2,r5
 dumpr3
 
 movu.w [r5],r3
 test_move_cc 0 1 0 0
 dumpr3
 
 quit

Line No.	Rev	Author	Line
1	26	jlechner	`# mach: crisv3 crisv8 crisv10 crisv32`
2			`# output: 5\nf5\n5\nfff5\n0\n`
3
4			`; Movu between registers. Check that zero-extension is performed and the`
5			`; full register is set.`
6
7			`.include "testutils.inc"`
8
9			`.data`
10			`x:`
11			`.byte 5,-11`
12			`.word 5,-11`
13			`.word 0`
14
15			`start`
16			`move.d x,r5`
17
18			`movu.b [r5+],r3`
19			`test_move_cc 0 0 0 0`
20			`dumpr3`
21
22			`movu.b [r5],r3`
23			`test_move_cc 0 0 0 0`
24			`addq 1,r5`
25			`dumpr3`
26
27			`movu.w [r5+],r3`
28			`test_move_cc 0 0 0 0`
29			`dumpr3`
30
31			`movu.w [r5],r3`
32			`test_move_cc 0 0 0 0`
33			`addq 2,r5`
34			`dumpr3`
35
36			`movu.w [r5],r3`
37			`test_move_cc 0 1 0 0`
38			`dumpr3`
39
40			`quit`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movum.ms] - Blame information for rev 26