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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [hw/] [rv-n-cris/] [irq2.ms] - Blame information for rev 26

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Line No. Rev Author Line
1 26 jlechner
#mach: crisv10 crisv32
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#sim(crisv10): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
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#sim(crisv32): --hw-device "/rv/trace? true" --hw-device "/rv/intmultiple 0xaa"
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#output: /rv: WD\n
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#output: /rv: REG R 0xd0000032\n
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#output: /rv: := 0xabcdef01\n
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#output: /rv: IRQ 0xaa\n
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#output: /rv: REG R 0xd0000036\n
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#output: /rv: := 0x76543210\n
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#output: /rv: REG R 0xd0000030\n
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#output: /rv: IRQ 0x0\n
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#output: /rv: := 0xeeff4455\n
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#output: pass\n
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# Primarily to test multiple-int-bits set in dv-rv.c.
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#r W,
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#r r,a8832,abcdef01
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#r I,6
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#r r,a8836,76543210
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#r I,0
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#r r,a8830,eeff4455
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 .lcomm dummy,4
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 .include "testutils.inc"
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 start
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 test_h_mem 0xabcdef01 0xd0000032
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 .if ..asm.arch.cris.v32
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 move irqvec1,$ebp
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 .else
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 move irqvec1,$ibr
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 .endif
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 ei
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 test_h_mem 0,dummy
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killme:
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 fail
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irq0xea:
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 test_h_mem 0x76543210 0xd0000036
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 test_h_mem 0xeeff4455 0xd0000030
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 pass
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 singlevec irqvec1,0xea,irq0xea

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