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# frv testcase for addxcc $GRi,$GRj,$GRk,$ICCi_1
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global addxcc
addxcc:
        set_gr_immed    1,gr7
        set_gr_immed    2,gr8
        set_icc         0x0e,0          ; Make sure carry bit is off
        addxcc          gr7,gr8,gr8,icc0
        test_icc        0 0 0 0 icc0
        test_gr_immed   3,gr8
 
        set_gr_limmed   0x7fff,0xffff,gr7
        set_gr_immed    1,gr8
        set_icc         0x04,0          ; Make sure carry bit is off
        addxcc          gr7,gr8,gr8,icc0
        test_icc        1 0 1 0 icc0
        test_gr_limmed  0x8000,0x0000,gr8
 
        set_icc         0x08,0          ; Make sure carry bit is off
        addxcc          gr8,gr8,gr8,icc0
        test_icc        0 1 1 1 icc0
        test_gr_immed   0,gr8
 
        set_gr_immed    1,gr7
        set_gr_immed    2,gr8
        set_icc         0x0f,0          ; Make sure carry bit is on
        addxcc          gr7,gr8,gr8,icc0
        test_icc        0 0 0 0 icc0
        test_gr_immed   4,gr8
 
        set_gr_limmed   0x7fff,0xffff,gr7
        set_gr_immed    0,gr8
        set_icc         0x05,0          ; Make sure carry bit is on
        addxcc          gr7,gr8,gr8,icc0
        test_icc        1 0 1 0 icc0
        test_gr_limmed  0x8000,0x0000,gr8
 
        set_gr_limmed   0x7fff,0xffff,gr7
        set_icc         0x0b,0          ; Make sure carry bit is on
        addxcc          gr7,gr8,gr8,icc0
        test_icc        0 1 0 1 icc0
        test_gr_immed   0,gr8
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for addxcc $GRi,$GRj,$GRk,$ICCi_1`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global addxcc`
9			`addxcc:`
10			`set_gr_immed 1,gr7`
11			`set_gr_immed 2,gr8`
12			`set_icc 0x0e,0 ; Make sure carry bit is off`
13			`addxcc gr7,gr8,gr8,icc0`
14			`test_icc 0 0 0 0 icc0`
15			`test_gr_immed 3,gr8`
16
17			`set_gr_limmed 0x7fff,0xffff,gr7`
18			`set_gr_immed 1,gr8`
19			`set_icc 0x04,0 ; Make sure carry bit is off`
20			`addxcc gr7,gr8,gr8,icc0`
21			`test_icc 1 0 1 0 icc0`
22			`test_gr_limmed 0x8000,0x0000,gr8`
23
24			`set_icc 0x08,0 ; Make sure carry bit is off`
25			`addxcc gr8,gr8,gr8,icc0`
26			`test_icc 0 1 1 1 icc0`
27			`test_gr_immed 0,gr8`
28
29			`set_gr_immed 1,gr7`
30			`set_gr_immed 2,gr8`
31			`set_icc 0x0f,0 ; Make sure carry bit is on`
32			`addxcc gr7,gr8,gr8,icc0`
33			`test_icc 0 0 0 0 icc0`
34			`test_gr_immed 4,gr8`
35
36			`set_gr_limmed 0x7fff,0xffff,gr7`
37			`set_gr_immed 0,gr8`
38			`set_icc 0x05,0 ; Make sure carry bit is on`
39			`addxcc gr7,gr8,gr8,icc0`
40			`test_icc 1 0 1 0 icc0`
41			`test_gr_limmed 0x8000,0x0000,gr8`
42
43			`set_gr_limmed 0x7fff,0xffff,gr7`
44			`set_icc 0x0b,0 ; Make sure carry bit is on`
45			`addxcc gr7,gr8,gr8,icc0`
46			`test_icc 0 1 0 1 icc0`
47			`test_gr_immed 0,gr8`
48
49			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [addxcc.cgs] - Blame information for rev 26