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# frv testcase for clddfu @($GRi,$GRj),$FRk,$CCi,$ccond
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global clddfu
clddfu:
        set_spr_immed   0x1b1b,cccr
        set_gr_gr       sp,gr21
 
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc0,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc0,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    8,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc4,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_gr_gr       sp,gr21
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc0,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,gr20
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc0,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    16,gr20
        inc_gr_immed    16,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc4,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_gr_gr       sp,gr21
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc1,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc1,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    8,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc5,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xdead,0xbeef,fr9
        test_gr_gr      sp,gr20
 
        set_gr_gr       sp,gr21
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc1,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,gr20
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc1,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    16,gr20
        inc_gr_immed    16,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc5,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_gr_gr       sp,gr21
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc2,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,gr20
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc2,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    16,gr20
        inc_gr_immed    16,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc6,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_gr_gr       sp,gr21
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
 
        set_gr_immed    0,gr7
        clddfu          @(sp,gr7),fr8,cc3,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    -8,gr20
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        clddfu          @(sp,gr7),fr8,cc3,0
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        inc_gr_immed    16,gr20
        inc_gr_immed    16,sp
        set_gr_immed    -8,gr7
        clddfu          @(sp,gr7),fr8,cc7,1
        test_fr_limmed  0xdead,0xbeef,fr8
        test_fr_limmed  0xbeef,0xdead,fr9
        test_gr_gr      sp,gr20
 
        pass

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [clddfu.cgs] - Blame information for rev 26

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for clddfu @($GRi,$GRj),$FRk,$CCi,$ccond`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global clddfu`
9			`clddfu:`
10			`set_spr_immed 0x1b1b,cccr`
11			`set_gr_gr sp,gr21`
12
13			`set_mem_limmed 0xdead,0xbeef,sp`
14			`inc_gr_immed -4,sp`
15			`set_mem_limmed 0xbeef,0xdead,sp`
16			`set_gr_gr sp,gr20`
17			`set_fr_iimmed 0xdead,0xbeef,fr8`
18			`set_fr_iimmed 0xbeef,0xdead,fr9`
19
20			`set_gr_immed 0,gr7`
21			`clddfu @(sp,gr7),fr8,cc0,1`
22			`test_fr_limmed 0xbeef,0xdead,fr8`
23			`test_fr_limmed 0xdead,0xbeef,fr9`
24			`test_gr_gr sp,gr20`
25
26			`set_fr_iimmed 0xdead,0xbeef,fr8`
27			`set_fr_iimmed 0xbeef,0xdead,fr9`
28			`inc_gr_immed -8,sp`
29			`set_gr_immed 8,gr7`
30			`clddfu @(sp,gr7),fr8,cc0,1`
31			`test_fr_limmed 0xbeef,0xdead,fr8`
32			`test_fr_limmed 0xdead,0xbeef,fr9`
33			`test_gr_gr sp,gr20`
34
35			`set_fr_iimmed 0xdead,0xbeef,fr8`
36			`set_fr_iimmed 0xbeef,0xdead,fr9`
37			`inc_gr_immed 8,sp`
38			`set_gr_immed -8,gr7`
39			`clddfu @(sp,gr7),fr8,cc4,1`
40			`test_fr_limmed 0xbeef,0xdead,fr8`
41			`test_fr_limmed 0xdead,0xbeef,fr9`
42			`test_gr_gr sp,gr20`
43
44			`set_gr_gr sp,gr21`
45			`set_mem_limmed 0xdead,0xbeef,sp`
46			`inc_gr_immed -4,sp`
47			`set_mem_limmed 0xbeef,0xdead,sp`
48			`set_gr_gr sp,gr20`
49			`set_fr_iimmed 0xdead,0xbeef,fr8`
50			`set_fr_iimmed 0xbeef,0xdead,fr9`
51
52			`set_gr_immed 0,gr7`
53			`clddfu @(sp,gr7),fr8,cc0,0`
54			`test_fr_limmed 0xdead,0xbeef,fr8`
55			`test_fr_limmed 0xbeef,0xdead,fr9`
56			`test_gr_gr sp,gr20`
57
58			`set_fr_iimmed 0xdead,0xbeef,fr8`
59			`set_fr_iimmed 0xbeef,0xdead,fr9`
60			`inc_gr_immed -8,gr20`
61			`inc_gr_immed -8,sp`
62			`set_gr_immed 8,gr7`
63			`clddfu @(sp,gr7),fr8,cc0,0`
64			`test_fr_limmed 0xdead,0xbeef,fr8`
65			`test_fr_limmed 0xbeef,0xdead,fr9`
66			`test_gr_gr sp,gr20`
67
68			`set_fr_iimmed 0xdead,0xbeef,fr8`
69			`set_fr_iimmed 0xbeef,0xdead,fr9`
70			`inc_gr_immed 16,gr20`
71			`inc_gr_immed 16,sp`
72			`set_gr_immed -8,gr7`
73			`clddfu @(sp,gr7),fr8,cc4,0`
74			`test_fr_limmed 0xdead,0xbeef,fr8`
75			`test_fr_limmed 0xbeef,0xdead,fr9`
76			`test_gr_gr sp,gr20`
77
78			`set_gr_gr sp,gr21`
79			`set_mem_limmed 0xdead,0xbeef,sp`
80			`inc_gr_immed -4,sp`
81			`set_mem_limmed 0xbeef,0xdead,sp`
82			`set_gr_gr sp,gr20`
83			`set_fr_iimmed 0xdead,0xbeef,fr8`
84			`set_fr_iimmed 0xbeef,0xdead,fr9`
85
86			`set_gr_immed 0,gr7`
87			`clddfu @(sp,gr7),fr8,cc1,0`
88			`test_fr_limmed 0xbeef,0xdead,fr8`
89			`test_fr_limmed 0xdead,0xbeef,fr9`
90			`test_gr_gr sp,gr20`
91
92			`set_fr_iimmed 0xdead,0xbeef,fr8`
93			`set_fr_iimmed 0xbeef,0xdead,fr9`
94			`inc_gr_immed -8,sp`
95			`set_gr_immed 8,gr7`
96			`clddfu @(sp,gr7),fr8,cc1,0`
97			`test_fr_limmed 0xbeef,0xdead,fr8`
98			`test_fr_limmed 0xdead,0xbeef,fr9`
99			`test_gr_gr sp,gr20`
100
101			`set_fr_iimmed 0xdead,0xbeef,fr8`
102			`set_fr_iimmed 0xbeef,0xdead,fr9`
103			`inc_gr_immed 8,sp`
104			`set_gr_immed -8,gr7`
105			`clddfu @(sp,gr7),fr8,cc5,0`
106			`test_fr_limmed 0xbeef,0xdead,fr8`
107			`test_fr_limmed 0xdead,0xbeef,fr9`
108			`test_gr_gr sp,gr20`
109
110			`set_gr_gr sp,gr21`
111			`set_mem_limmed 0xdead,0xbeef,sp`
112			`inc_gr_immed -4,sp`
113			`set_mem_limmed 0xbeef,0xdead,sp`
114			`set_gr_gr sp,gr20`
115			`set_fr_iimmed 0xdead,0xbeef,fr8`
116			`set_fr_iimmed 0xbeef,0xdead,fr9`
117
118			`set_gr_immed 0,gr7`
119			`clddfu @(sp,gr7),fr8,cc1,1`
120			`test_fr_limmed 0xdead,0xbeef,fr8`
121			`test_fr_limmed 0xbeef,0xdead,fr9`
122			`test_gr_gr sp,gr20`
123
124			`set_fr_iimmed 0xdead,0xbeef,fr8`
125			`set_fr_iimmed 0xbeef,0xdead,fr9`
126			`inc_gr_immed -8,gr20`
127			`inc_gr_immed -8,sp`
128			`set_gr_immed 8,gr7`
129			`clddfu @(sp,gr7),fr8,cc1,1`
130			`test_fr_limmed 0xdead,0xbeef,fr8`
131			`test_fr_limmed 0xbeef,0xdead,fr9`
132			`test_gr_gr sp,gr20`
133
134			`set_fr_iimmed 0xdead,0xbeef,fr8`
135			`set_fr_iimmed 0xbeef,0xdead,fr9`
136			`inc_gr_immed 16,gr20`
137			`inc_gr_immed 16,sp`
138			`set_gr_immed -8,gr7`
139			`clddfu @(sp,gr7),fr8,cc5,1`
140			`test_fr_limmed 0xdead,0xbeef,fr8`
141			`test_fr_limmed 0xbeef,0xdead,fr9`
142			`test_gr_gr sp,gr20`
143
144			`set_gr_gr sp,gr21`
145			`set_mem_limmed 0xdead,0xbeef,sp`
146			`inc_gr_immed -4,sp`
147			`set_mem_limmed 0xbeef,0xdead,sp`
148			`set_gr_gr sp,gr20`
149			`set_fr_iimmed 0xdead,0xbeef,fr8`
150			`set_fr_iimmed 0xbeef,0xdead,fr9`
151
152			`set_gr_immed 0,gr7`
153			`clddfu @(sp,gr7),fr8,cc2,0`
154			`test_fr_limmed 0xdead,0xbeef,fr8`
155			`test_fr_limmed 0xbeef,0xdead,fr9`
156			`test_gr_gr sp,gr20`
157
158			`set_fr_iimmed 0xdead,0xbeef,fr8`
159			`set_fr_iimmed 0xbeef,0xdead,fr9`
160			`inc_gr_immed -8,gr20`
161			`inc_gr_immed -8,sp`
162			`set_gr_immed 8,gr7`
163			`clddfu @(sp,gr7),fr8,cc2,1`
164			`test_fr_limmed 0xdead,0xbeef,fr8`
165			`test_fr_limmed 0xbeef,0xdead,fr9`
166			`test_gr_gr sp,gr20`
167
168			`set_fr_iimmed 0xdead,0xbeef,fr8`
169			`set_fr_iimmed 0xbeef,0xdead,fr9`
170			`inc_gr_immed 16,gr20`
171			`inc_gr_immed 16,sp`
172			`set_gr_immed -8,gr7`
173			`clddfu @(sp,gr7),fr8,cc6,0`
174			`test_fr_limmed 0xdead,0xbeef,fr8`
175			`test_fr_limmed 0xbeef,0xdead,fr9`
176			`test_gr_gr sp,gr20`
177
178			`set_gr_gr sp,gr21`
179			`set_mem_limmed 0xdead,0xbeef,sp`
180			`inc_gr_immed -4,sp`
181			`set_mem_limmed 0xbeef,0xdead,sp`
182			`set_gr_gr sp,gr20`
183			`set_fr_iimmed 0xdead,0xbeef,fr8`
184			`set_fr_iimmed 0xbeef,0xdead,fr9`
185
186			`set_gr_immed 0,gr7`
187			`clddfu @(sp,gr7),fr8,cc3,1`
188			`test_fr_limmed 0xdead,0xbeef,fr8`
189			`test_fr_limmed 0xbeef,0xdead,fr9`
190			`test_gr_gr sp,gr20`
191
192			`set_fr_iimmed 0xdead,0xbeef,fr8`
193			`set_fr_iimmed 0xbeef,0xdead,fr9`
194			`inc_gr_immed -8,gr20`
195			`inc_gr_immed -8,sp`
196			`set_gr_immed 8,gr7`
197			`clddfu @(sp,gr7),fr8,cc3,0`
198			`test_fr_limmed 0xdead,0xbeef,fr8`
199			`test_fr_limmed 0xbeef,0xdead,fr9`
200			`test_gr_gr sp,gr20`
201
202			`set_fr_iimmed 0xdead,0xbeef,fr8`
203			`set_fr_iimmed 0xbeef,0xdead,fr9`
204			`inc_gr_immed 16,gr20`
205			`inc_gr_immed 16,sp`
206			`set_gr_immed -8,gr7`
207			`clddfu @(sp,gr7),fr8,cc7,1`
208			`test_fr_limmed 0xdead,0xbeef,fr8`
209			`test_fr_limmed 0xbeef,0xdead,fr9`
210			`test_gr_gr sp,gr20`
211
212			`pass`