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# FRV testcase for ici @(GRi,GRj)
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global ici
ici:
        set_gr_immed    1234,gr2
        set_spr_addr    ok1,lr
        bra             testit
 
ok1:
        ; Change the first insn to set gr1 to 1235
        ; but don't invalidate the insn cache
        ; should have no effect
        set_gr_mem      testit,gr10
        ori             gr10,1,gr10
        set_mem_gr      gr10,testit
        set_gr_addr     testit,gr10
        dcf             @(gr10,gr0)     ; flush data cache
        set_spr_addr    ok2,lr
        bra             testit
 
ok2:    ; Now invalidate the insn cache. The new insn should take effect
        ici             @(gr10,gr0)
        set_gr_immed    1235,gr2
        set_spr_addr    ok3,lr
        bra             testit
 
ok3:
        pass
 
testit:
        setlos          1234,gr1
        test_gr_gr      gr1,gr2
        bralr
        fail

Line No.	Rev	Author	Line
1	26	jlechner	`# FRV testcase for ici @(GRi,GRj)`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global ici`
9			`ici:`
10			`set_gr_immed 1234,gr2`
11			`set_spr_addr ok1,lr`
12			`bra testit`
13
14			`ok1:`
15			`; Change the first insn to set gr1 to 1235`
16			`; but don't invalidate the insn cache`
17			`; should have no effect`
18			`set_gr_mem testit,gr10`
19			`ori gr10,1,gr10`
20			`set_mem_gr gr10,testit`
21			`set_gr_addr testit,gr10`
22			`dcf @(gr10,gr0) ; flush data cache`
23			`set_spr_addr ok2,lr`
24			`bra testit`
25
26			`ok2: ; Now invalidate the insn cache. The new insn should take effect`
27			`ici @(gr10,gr0)`
28			`set_gr_immed 1235,gr2`
29			`set_spr_addr ok3,lr`
30			`bra testit`
31
32			`ok3:`
33			`pass`
34
35			`testit:`
36			`setlos 1234,gr1`
37			`test_gr_gr gr1,gr2`
38			`bralr`
39			`fail`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [ici.cgs] - Blame information for rev 26