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# frv testcase for lddc @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv
 
        .include "testutils.inc"
 
        start
 
        .global lddc
lddc:
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
 
        set_gr_immed    0,gr7
        ; loading into cpr0 is business as usual
        set_cpr_limmed  0xdead,0xbeef,cpr0
        set_cpr_limmed  0xbeef,0xdead,cpr1
        lddc            @(sp,gr7),cpr0
        test_cpr_limmed 0xbeef,0xdead,cpr0
        test_cpr_limmed 0xdead,0xbeef,cpr1
 
        lddc            @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
 
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        lddc            @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
 
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    16,sp
        set_gr_immed    -8,gr7
        lddc            @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for lddc @($GRi,$GRj),$GRk`
2			`# mach: frv`
3			`# as(frv): -mcpu=frv`
4
5			`.include "testutils.inc"`
6
7			`start`
8
9			`.global lddc`
10			`lddc:`
11			`set_mem_limmed 0xdead,0xbeef,sp`
12			`inc_gr_immed -4,sp`
13			`set_mem_limmed 0xbeef,0xdead,sp`
14			`set_cpr_limmed 0xdead,0xbeef,cpr8`
15			`set_cpr_limmed 0xbeef,0xdead,cpr9`
16
17			`set_gr_immed 0,gr7`
18			`; loading into cpr0 is business as usual`
19			`set_cpr_limmed 0xdead,0xbeef,cpr0`
20			`set_cpr_limmed 0xbeef,0xdead,cpr1`
21			`lddc @(sp,gr7),cpr0`
22			`test_cpr_limmed 0xbeef,0xdead,cpr0`
23			`test_cpr_limmed 0xdead,0xbeef,cpr1`
24
25			`lddc @(sp,gr7),cpr8`
26			`test_cpr_limmed 0xbeef,0xdead,cpr8`
27			`test_cpr_limmed 0xdead,0xbeef,cpr9`
28
29			`set_cpr_limmed 0xdead,0xbeef,cpr8`
30			`set_cpr_limmed 0xbeef,0xdead,cpr9`
31			`inc_gr_immed -8,sp`
32			`set_gr_immed 8,gr7`
33			`lddc @(sp,gr7),cpr8`
34			`test_cpr_limmed 0xbeef,0xdead,cpr8`
35			`test_cpr_limmed 0xdead,0xbeef,cpr9`
36
37			`set_cpr_limmed 0xdead,0xbeef,cpr8`
38			`set_cpr_limmed 0xbeef,0xdead,cpr9`
39			`inc_gr_immed 16,sp`
40			`set_gr_immed -8,gr7`
41			`lddc @(sp,gr7),cpr8`
42			`test_cpr_limmed 0xbeef,0xdead,cpr8`
43			`test_cpr_limmed 0xdead,0xbeef,cpr9`
44
45			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [lddc.cgs] - Blame information for rev 26