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# frv testcase for lddcu @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv
 
        .include "testutils.inc"
 
        start
 
        .global lddcu
lddcu:
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
 
        set_gr_immed    0,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20
 
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20
 
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    8,sp
        set_gr_immed    -8,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for lddcu @($GRi,$GRj),$GRk`
2			`# mach: frv`
3			`# as(frv): -mcpu=frv`
4
5			`.include "testutils.inc"`
6
7			`start`
8
9			`.global lddcu`
10			`lddcu:`
11			`set_mem_limmed 0xdead,0xbeef,sp`
12			`inc_gr_immed -4,sp`
13			`set_mem_limmed 0xbeef,0xdead,sp`
14			`set_gr_gr sp,gr20`
15			`set_cpr_limmed 0xdead,0xbeef,cpr8`
16			`set_cpr_limmed 0xbeef,0xdead,cpr9`
17
18			`set_gr_immed 0,gr7`
19			`lddcu @(sp,gr7),cpr8`
20			`test_cpr_limmed 0xbeef,0xdead,cpr8`
21			`test_cpr_limmed 0xdead,0xbeef,cpr9`
22			`test_gr_gr sp,gr20`
23
24			`set_cpr_limmed 0xdead,0xbeef,cpr8`
25			`set_cpr_limmed 0xbeef,0xdead,cpr9`
26			`inc_gr_immed -8,sp`
27			`set_gr_immed 8,gr7`
28			`lddcu @(sp,gr7),cpr8`
29			`test_cpr_limmed 0xbeef,0xdead,cpr8`
30			`test_cpr_limmed 0xdead,0xbeef,cpr9`
31			`test_gr_gr sp,gr20`
32
33			`set_cpr_limmed 0xdead,0xbeef,cpr8`
34			`set_cpr_limmed 0xbeef,0xdead,cpr9`
35			`inc_gr_immed 8,sp`
36			`set_gr_immed -8,gr7`
37			`lddcu @(sp,gr7),cpr8`
38			`test_cpr_limmed 0xbeef,0xdead,cpr8`
39			`test_cpr_limmed 0xdead,0xbeef,cpr9`
40			`test_gr_gr sp,gr20`
41
42			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [lddcu.cgs] - Blame information for rev 26