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# frv testcase for nsdiv $GRi,$GRj,$GRk
# mach: fr500 fr550 frv
 
        .include "testutils.inc"
 
        start
 
        .global nsdiv
nsdiv:
        set_spr_immed   0,gner0
        set_spr_immed   0,gner1
 
        ; simple division 12 / 3
        set_gr_immed    3,gr3
        set_gr_immed    12,gr1
        nsdiv           gr1,gr3,gr2
        test_gr_immed   4,gr2
        test_spr_immed  0,gner0
        test_spr_immed  0,gner1
 
        ; Random example
        set_gr_limmed   0x0123,0x4567,gr3
        set_gr_limmed   0xfedc,0xba98,gr1
        nsdiv           gr1,gr3,gr2
        test_gr_immed   -1,gr2
        test_spr_immed  0,gner0
        test_spr_immed  0,gner1
 
        ; Special case from the Arch Spec Vol 2
        or_spr_immed    0x20,isr        ; turn on isr.edem
        set_gr_immed    -1,gr3
        set_gr_limmed   0x8000,0x0000,gr1
        set_spr_immed   4,gner1         ; turn on NE bit for gr2
        nsdiv           gr1,gr3,gr2     ; overflow is masked
        test_gr_limmed  0x7fff,0xffff,gr2
        test_spr_bits   0x4,2,1,isr     ; isr.aexc is set
        test_spr_immed  0,gner0
        test_spr_immed  0,gner1
 
        nsdiv           gr1,gr0,gr32    ; divide by zero
        test_spr_immed  1,gner0
        test_spr_immed  0,gner1
 
        and_spr_immed   -33,isr         ; turn off isr.edem
        set_gr_immed    -1,gr3
        set_gr_limmed   0x8000,0x0000,gr1
        nsdiv           gr1,gr3,gr2
        test_gr_limmed  0x8000,0x0000,gr2
        test_spr_immed  1,gner0
        test_spr_immed  4,gner1
 
        nsdiv           gr1,gr0,gr10    ; divide by zero
        test_spr_immed  1,gner0
        test_spr_immed  0x00000404,gner1
 
        ; simple division 12 / 3 -- should turn off ne flag
        set_gr_immed    3,gr3
        set_gr_immed    12,gr1
        nsdiv           gr1,gr3,gr2
        test_gr_immed   4,gr2
        test_spr_immed  1,gner0
        test_spr_immed  0x00000400,gner1
 
        pass

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for nsdiv $GRi,$GRj,$GRk`
2			`# mach: fr500 fr550 frv`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global nsdiv`
9			`nsdiv:`
10			`set_spr_immed 0,gner0`
11			`set_spr_immed 0,gner1`
12
13			`; simple division 12 / 3`
14			`set_gr_immed 3,gr3`
15			`set_gr_immed 12,gr1`
16			`nsdiv gr1,gr3,gr2`
17			`test_gr_immed 4,gr2`
18			`test_spr_immed 0,gner0`
19			`test_spr_immed 0,gner1`
20
21			`; Random example`
22			`set_gr_limmed 0x0123,0x4567,gr3`
23			`set_gr_limmed 0xfedc,0xba98,gr1`
24			`nsdiv gr1,gr3,gr2`
25			`test_gr_immed -1,gr2`
26			`test_spr_immed 0,gner0`
27			`test_spr_immed 0,gner1`
28
29			`; Special case from the Arch Spec Vol 2`
30			`or_spr_immed 0x20,isr ; turn on isr.edem`
31			`set_gr_immed -1,gr3`
32			`set_gr_limmed 0x8000,0x0000,gr1`
33			`set_spr_immed 4,gner1 ; turn on NE bit for gr2`
34			`nsdiv gr1,gr3,gr2 ; overflow is masked`
35			`test_gr_limmed 0x7fff,0xffff,gr2`
36			`test_spr_bits 0x4,2,1,isr ; isr.aexc is set`
37			`test_spr_immed 0,gner0`
38			`test_spr_immed 0,gner1`
39
40			`nsdiv gr1,gr0,gr32 ; divide by zero`
41			`test_spr_immed 1,gner0`
42			`test_spr_immed 0,gner1`
43
44			`and_spr_immed -33,isr ; turn off isr.edem`
45			`set_gr_immed -1,gr3`
46			`set_gr_limmed 0x8000,0x0000,gr1`
47			`nsdiv gr1,gr3,gr2`
48			`test_gr_limmed 0x8000,0x0000,gr2`
49			`test_spr_immed 1,gner0`
50			`test_spr_immed 4,gner1`
51
52			`nsdiv gr1,gr0,gr10 ; divide by zero`
53			`test_spr_immed 1,gner0`
54			`test_spr_immed 0x00000404,gner1`
55
56			`; simple division 12 / 3 -- should turn off ne flag`
57			`set_gr_immed 3,gr3`
58			`set_gr_immed 12,gr1`
59			`nsdiv gr1,gr3,gr2`
60			`test_gr_immed 4,gr2`
61			`test_spr_immed 1,gner0`
62			`test_spr_immed 0x00000400,gner1`
63
64			`pass`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [nsdiv.cgs] - Blame information for rev 26