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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [movl.s] - Blame information for rev 26

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1 26 jlechner 
# Hitachi H8 testcase 'mov.l'
2 
# mach(): h8300h h8300s h8sx
3 
# as(h8300h):   --defsym sim_cpu=1
4 
# as(h8300s):   --defsym sim_cpu=2
5 
# as(h8sx):     --defsym sim_cpu=3
6 
# ld(h8300h):   -m h8300helf
7 
# ld(h8300s):   -m h8300self
8 
# ld(h8sx):     -m h8300sxelf
9 
 
10 
        .include "testutils.inc"
11 
 
12 
        start
13 
 
14 
        .data
15 
        .align  4
16 
long_src:
17 
        .long   0x77777777
18 
long_dst:
19 
        .long   0
20 
 
21 
        .text
22 
 
23 
        ;;
24 
        ;; Move long from immediate source
25 
        ;;
26 
 
27 
.if (sim_cpu == h8sx)
28 
mov_l_imm3_to_reg32:
29 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
30 
        set_ccr_zero
31 
 
32 
        ;; mov.l #xx:3, erd
33 
        mov.l   #0x3:3, er0     ; Immediate 3-bit operand
34 
;;;     .word   0x0fb8
35 
 
36 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
37 
        test_neg_clear
38 
        test_zero_clear
39 
        test_ovf_clear
40 
        test_carry_clear
41 
 
42 
        test_h_gr32 0x3 er0
43 
 
44 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
45 
        test_gr_a5a5 2
46 
        test_gr_a5a5 3
47 
        test_gr_a5a5 4
48 
        test_gr_a5a5 5
49 
        test_gr_a5a5 6
50 
        test_gr_a5a5 7
51 
 
52 
mov_l_imm16_to_reg32:
53 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
54 
        set_ccr_zero
55 
 
56 
        ;; mov.l #xx:16, erd
57 
        mov.l   #0x1234, er0    ; Immediate 16-bit operand
58 
;;;     .word   0x7a08
59 
;;;     .word   0x1234
60 
 
61 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
62 
        test_neg_clear
63 
        test_zero_clear
64 
        test_ovf_clear
65 
        test_carry_clear
66 
 
67 
        test_h_gr32 0x1234 er0
68 
 
69 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
70 
        test_gr_a5a5 2
71 
        test_gr_a5a5 3
72 
        test_gr_a5a5 4
73 
        test_gr_a5a5 5
74 
        test_gr_a5a5 6
75 
        test_gr_a5a5 7
76 
.endif
77 
 
78 
mov_l_imm32_to_reg32:
79 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
80 
        set_ccr_zero
81 
 
82 
        ;; mov.l #xx:32, erd
83 
        mov.l   #0x12345678, er0        ; Immediate 32-bit operand
84 
;;;     .word   0x7a00
85 
;;;     .long   0x12345678
86 
 
87 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
88 
        test_neg_clear
89 
        test_zero_clear
90 
        test_ovf_clear
91 
        test_carry_clear
92 
 
93 
        test_h_gr32 0x12345678 er0
94 
 
95 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
96 
        test_gr_a5a5 2
97 
        test_gr_a5a5 3
98 
        test_gr_a5a5 4
99 
        test_gr_a5a5 5
100 
        test_gr_a5a5 6
101 
        test_gr_a5a5 7
102 
 
103 
.if (sim_cpu == h8sx)
104 
mov_l_imm8_to_indirect:
105 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
106 
        set_ccr_zero
107 
 
108 
        ;; mov.l #xx:8, @erd
109 
        mov.l   #long_dst, er1
110 
        mov.l   #0xa5:8, @er1   ; Register indirect operand
111 
;;;     .word   0x010d
112 
;;;     .word   0x01a5
113 
 
114 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
115 
        test_neg_clear
116 
        test_zero_clear
117 
        test_ovf_clear
118 
        test_carry_clear
119 
 
120 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
121 
        test_h_gr32     long_dst, er1
122 
        test_gr_a5a5 2
123 
        test_gr_a5a5 3
124 
        test_gr_a5a5 4
125 
        test_gr_a5a5 5
126 
        test_gr_a5a5 6
127 
        test_gr_a5a5 7
128 
 
129 
        ;; Now check the result of the move to memory.
130 
        cmp.l   #0xa5, @long_dst
131 
        beq     .Lnext1
132 
        fail
133 
.Lnext1:
134 
        mov.l   #0, @long_dst    ; zero it again for the next use.
135 
 
136 
mov_l_imm8_to_postinc:          ; post-increment from imm8 to mem
137 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
138 
        set_ccr_zero
139 
 
140 
        ;; mov.l #xx:8, @erd+
141 
        mov.l   #long_dst, er1
142 
        mov.l   #0xa5:8, @er1+  ; Imm8, register post-incr operands.
143 
;;;     .word   0x010d
144 
;;;     .word   0x81a5
145 
 
146 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
147 
        test_neg_clear
148 
        test_zero_clear
149 
        test_ovf_clear
150 
        test_carry_clear
151 
 
152 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
153 
        test_h_gr32     long_dst+4, er1
154 
        test_gr_a5a5 2
155 
        test_gr_a5a5 3
156 
        test_gr_a5a5 4
157 
        test_gr_a5a5 5
158 
        test_gr_a5a5 6
159 
        test_gr_a5a5 7
160 
 
161 
        ;; Now check the result of the move to memory.
162 
        cmp.l   #0xa5, @long_dst
163 
        beq     .Lnext2
164 
        fail
165 
.Lnext2:
166 
        mov.l   #0, @long_dst    ; zero it again for the next use.
167 
 
168 
mov_l_imm8_to_postdec:          ; post-decrement from imm8 to mem
169 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
170 
        set_ccr_zero
171 
 
172 
        ;; mov.l #xx:8, @erd-
173 
        mov.l   #long_dst, er1
174 
        mov.l   #0xa5:8, @er1-  ; Imm8, register post-decr operands.
175 
;;;     .word   0x010d
176 
;;;     .word   0xa1a5
177 
 
178 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
179 
        test_neg_clear
180 
        test_zero_clear
181 
        test_ovf_clear
182 
        test_carry_clear
183 
 
184 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
185 
        test_h_gr32     long_dst-4, er1
186 
        test_gr_a5a5 2
187 
        test_gr_a5a5 3
188 
        test_gr_a5a5 4
189 
        test_gr_a5a5 5
190 
        test_gr_a5a5 6
191 
        test_gr_a5a5 7
192 
 
193 
        ;; Now check the result of the move to memory.
194 
        cmp.l   #0xa5, @long_dst
195 
        beq     .Lnext3
196 
        fail
197 
.Lnext3:
198 
        mov.l   #0, @long_dst    ; zero it again for the next use.
199 
 
200 
mov_l_imm8_to_preinc:           ; pre-increment from register to mem
201 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
202 
        set_ccr_zero
203 
 
204 
        ;; mov.l #xx:8, @+erd
205 
        mov.l   #long_dst-4, er1
206 
        mov.l   #0xa5:8, @+er1  ; Imm8, register pre-incr operands
207 
;;;     .word   0x010d
208 
;;;     .word   0x91a5
209 
 
210 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
211 
        test_neg_clear
212 
        test_zero_clear
213 
        test_ovf_clear
214 
        test_carry_clear
215 
 
216 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
217 
        test_h_gr32     long_dst, er1
218 
        test_gr_a5a5 2
219 
        test_gr_a5a5 3
220 
        test_gr_a5a5 4
221 
        test_gr_a5a5 5
222 
        test_gr_a5a5 6
223 
        test_gr_a5a5 7
224 
 
225 
        ;; Now check the result of the move to memory.
226 
        cmp.l   #0xa5, @long_dst
227 
        beq     .Lnext4
228 
        fail
229 
.Lnext4:
230 
        mov.l   #0, @long_dst    ; zero it again for the next use.
231 
 
232 
mov_l_imm8_to_predec:           ; pre-decrement from register to mem
233 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
234 
        set_ccr_zero
235 
 
236 
        ;; mov.l #xx:8, @-erd
237 
        mov.l   #long_dst+4, er1
238 
        mov.l   #0xa5:8, @-er1  ; Imm8, register pre-decr operands
239 
;;;     .word   0x010d
240 
;;;     .word   0xb1a5
241 
 
242 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
243 
        test_neg_clear
244 
        test_zero_clear
245 
        test_ovf_clear
246 
        test_carry_clear
247 
 
248 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
249 
        test_h_gr32     long_dst, er1
250 
        test_gr_a5a5 2
251 
        test_gr_a5a5 3
252 
        test_gr_a5a5 4
253 
        test_gr_a5a5 5
254 
        test_gr_a5a5 6
255 
        test_gr_a5a5 7
256 
 
257 
        ;; Now check the result of the move to memory.
258 
        cmp.l   #0xa5, @long_dst
259 
        beq     .Lnext5
260 
        fail
261 
.Lnext5:
262 
        mov.l   #0, @long_dst    ; zero it again for the next use.
263 
 
264 
mov_l_imm8_to_disp2:
265 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
266 
        set_ccr_zero
267 
 
268 
        ;; mov.l #xx:8, @(dd:2, erd)
269 
        mov.l   #long_dst-12, er1
270 
        mov.l   #0xa5:8, @(12:2, er1)   ; Imm8, reg plus 2-bit disp. operand
271 
;;;     .word   0x010d
272 
;;;     .word   0x31a5
273 
 
274 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
275 
        test_neg_clear
276 
        test_zero_clear
277 
        test_ovf_clear
278 
        test_carry_clear
279 
 
280 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
281 
        test_h_gr32     long_dst-12, er1
282 
        test_gr_a5a5 2
283 
        test_gr_a5a5 3
284 
        test_gr_a5a5 4
285 
        test_gr_a5a5 5
286 
        test_gr_a5a5 6
287 
        test_gr_a5a5 7
288 
 
289 
        ;; Now check the result of the move to memory.
290 
        cmp.l   #0xa5, @long_dst
291 
        beq     .Lnext6
292 
        fail
293 
.Lnext6:
294 
        mov.l   #0, @long_dst    ; zero it again for the next use.
295 
 
296 
mov_l_imm8_to_disp16:
297 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
298 
        set_ccr_zero
299 
 
300 
        ;; mov.l #xx:8, @(dd:16, erd)
301 
        mov.l   #long_dst-4, er1
302 
        mov.l   #0xa5:8, @(4:16, er1)   ; Register plus 16-bit disp. operand
303 
;;;     .word   0x010d
304 
;;;     .word   0x6f90
305 
;;;     .word   0x0004
306 
 
307 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
308 
        test_neg_clear
309 
        test_zero_clear
310 
        test_ovf_clear
311 
        test_carry_clear
312 
 
313 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
314 
        test_h_gr32     long_dst-4, er1
315 
        test_gr_a5a5 2
316 
        test_gr_a5a5 3
317 
        test_gr_a5a5 4
318 
        test_gr_a5a5 5
319 
        test_gr_a5a5 6
320 
        test_gr_a5a5 7
321 
 
322 
        ;; Now check the result of the move to memory.
323 
        cmp.l   #0xa5, @long_dst
324 
        beq     .Lnext7
325 
        fail
326 
.Lnext7:
327 
        mov.l   #0, @long_dst    ; zero it again for the next use.
328 
 
329 
mov_l_imm8_to_disp32:
330 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
331 
        set_ccr_zero
332 
 
333 
        ;; mov.l #xx:8, @(dd:32, erd)
334 
        mov.l   #long_dst-8, er1
335 
        mov.l   #0xa5:8, @(8:32, er1)   ; Register plus 32-bit disp. operand
336 
;;;     .word   0x010d
337 
;;;     .word   0xc9a5
338 
;;;     .long   8
339 
 
340 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
341 
        test_neg_clear
342 
        test_zero_clear
343 
        test_ovf_clear
344 
        test_carry_clear
345 
 
346 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
347 
        test_h_gr32     long_dst-8, er1
348 
        test_gr_a5a5 2
349 
        test_gr_a5a5 3
350 
        test_gr_a5a5 4
351 
        test_gr_a5a5 5
352 
        test_gr_a5a5 6
353 
        test_gr_a5a5 7
354 
 
355 
        ;; Now check the result of the move to memory.
356 
        cmp.l   #0xa5, @long_dst
357 
        beq     .Lnext8
358 
        fail
359 
.Lnext8:
360 
        mov.l   #0, @long_dst    ; zero it again for the next use.
361 
 
362 
mov_l_imm8_to_abs16:
363 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
364 
        set_ccr_zero
365 
 
366 
        ;; mov.l #xx:8, @aa:16
367 
        mov.l   #0xa5:8, @long_dst:16   ; 16-bit address-direct operand
368 
;;;     .word   0x010d
369 
;;;     .word   0x40a5
370 
;;;     .word   @long_dst
371 
 
372 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
373 
        test_neg_clear
374 
        test_zero_clear
375 
        test_ovf_clear
376 
        test_carry_clear
377 
 
378 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
379 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
380 
        test_gr_a5a5 2          ; to examine the destination memory).
381 
        test_gr_a5a5 3
382 
        test_gr_a5a5 4
383 
        test_gr_a5a5 5
384 
        test_gr_a5a5 6
385 
        test_gr_a5a5 7
386 
 
387 
        ;; Now check the result of the move to memory.
388 
        cmp.l   #0xa5, @long_dst
389 
        beq     .Lnext9
390 
        fail
391 
.Lnext9:
392 
        mov.l   #0, @long_dst    ; zero it again for the next use.
393 
 
394 
mov_l_imm8_to_abs32:
395 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
396 
        set_ccr_zero
397 
 
398 
        ;; mov.l #xx:8, @aa:32
399 
        mov.l   #0xa5:8, @long_dst:32   ; 32-bit address-direct operand
400 
;;;     .word   0x010d
401 
;;;     .word   0x48a5
402 
;;;     .long   @long_dst
403 
 
404 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
405 
        test_neg_clear
406 
        test_zero_clear
407 
        test_ovf_clear
408 
        test_carry_clear
409 
 
410 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
411 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
412 
        test_gr_a5a5 2          ; to examine the destination memory).
413 
        test_gr_a5a5 3
414 
        test_gr_a5a5 4
415 
        test_gr_a5a5 5
416 
        test_gr_a5a5 6
417 
        test_gr_a5a5 7
418 
 
419 
        ;; Now check the result of the move to memory.
420 
        cmp.l   #0xa5, @long_dst
421 
        beq     .Lnext10
422 
        fail
423 
.Lnext10:
424 
        mov.l   #0, @long_dst    ; zero it again for the next use.
425 
 
426 
mov_l_imm16_to_indirect:
427 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
428 
        set_ccr_zero
429 
 
430 
        ;; mov.l #xx:16, @erd
431 
        mov.l   #long_dst, er1
432 
        mov.l   #0xdead:16, @er1        ; Register indirect operand
433 
;;;     .word   0x7a7c
434 
;;;     .word   0xdead
435 
;;;     .word   0x0100
436 
 
437 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
438 
        test_neg_clear
439 
        test_zero_clear
440 
        test_ovf_clear
441 
        test_carry_clear
442 
 
443 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
444 
        test_h_gr32     long_dst, er1
445 
        test_gr_a5a5 2
446 
        test_gr_a5a5 3
447 
        test_gr_a5a5 4
448 
        test_gr_a5a5 5
449 
        test_gr_a5a5 6
450 
        test_gr_a5a5 7
451 
 
452 
        ;; Now check the result of the move to memory.
453 
        cmp.l   #0xdead, @long_dst
454 
        beq     .Lnext11
455 
        fail
456 
.Lnext11:
457 
        mov.l   #0, @long_dst    ; zero it again for the next use.
458 
 
459 
mov_l_imm16_to_postinc:         ; post-increment from imm16 to mem
460 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
461 
        set_ccr_zero
462 
 
463 
        ;; mov.l #xx:16, @erd+
464 
        mov.l   #long_dst, er1
465 
        mov.l   #0xdead:16, @er1+       ; Imm16, register post-incr operands.
466 
;;;     .word   0x7a7c
467 
;;;     .word   0xdead
468 
;;;     .word   0x8100
469 
 
470 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
471 
        test_neg_clear
472 
        test_zero_clear
473 
        test_ovf_clear
474 
        test_carry_clear
475 
 
476 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
477 
        test_h_gr32     long_dst+4, er1
478 
        test_gr_a5a5 2
479 
        test_gr_a5a5 3
480 
        test_gr_a5a5 4
481 
        test_gr_a5a5 5
482 
        test_gr_a5a5 6
483 
        test_gr_a5a5 7
484 
 
485 
        ;; Now check the result of the move to memory.
486 
        cmp.l   #0xdead, @long_dst
487 
        beq     .Lnext12
488 
        fail
489 
.Lnext12:
490 
        mov.l   #0, @long_dst    ; zero it again for the next use.
491 
 
492 
mov_l_imm16_to_postdec:         ; post-decrement from imm16 to mem
493 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
494 
        set_ccr_zero
495 
 
496 
        ;; mov.l #xx:16, @erd-
497 
        mov.l   #long_dst, er1
498 
        mov.l   #0xdead:16, @er1-       ; Imm16, register post-decr operands.
499 
;;;     .word   0x7a7c
500 
;;;     .word   0xdead
501 
;;;     .word   0xa100
502 
 
503 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
504 
        test_neg_clear
505 
        test_zero_clear
506 
        test_ovf_clear
507 
        test_carry_clear
508 
 
509 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
510 
        test_h_gr32     long_dst-4, er1
511 
        test_gr_a5a5 2
512 
        test_gr_a5a5 3
513 
        test_gr_a5a5 4
514 
        test_gr_a5a5 5
515 
        test_gr_a5a5 6
516 
        test_gr_a5a5 7
517 
 
518 
        ;; Now check the result of the move to memory.
519 
        cmp.l   #0xdead, @long_dst
520 
        beq     .Lnext13
521 
        fail
522 
.Lnext13:
523 
        mov.l   #0, @long_dst    ; zero it again for the next use.
524 
 
525 
mov_l_imm16_to_preinc:          ; pre-increment from register to mem
526 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
527 
        set_ccr_zero
528 
 
529 
        ;; mov.l #xx:16, @+erd
530 
        mov.l   #long_dst-4, er1
531 
        mov.l   #0xdead:16, @+er1       ; Imm16, register pre-incr operands
532 
;;;     .word   0x7a7c
533 
;;;     .word   0xdead
534 
;;;     .word   0x9100
535 
 
536 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
537 
        test_neg_clear
538 
        test_zero_clear
539 
        test_ovf_clear
540 
        test_carry_clear
541 
 
542 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
543 
        test_h_gr32     long_dst, er1
544 
        test_gr_a5a5 2
545 
        test_gr_a5a5 3
546 
        test_gr_a5a5 4
547 
        test_gr_a5a5 5
548 
        test_gr_a5a5 6
549 
        test_gr_a5a5 7
550 
 
551 
        ;; Now check the result of the move to memory.
552 
        cmp.l   #0xdead, @long_dst
553 
        beq     .Lnext14
554 
        fail
555 
.Lnext14:
556 
        mov.l   #0, @long_dst    ; zero it again for the next use.
557 
 
558 
mov_l_imm16_to_predec:          ; pre-decrement from register to mem
559 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
560 
        set_ccr_zero
561 
 
562 
        ;; mov.l #xx:16, @-erd
563 
        mov.l   #long_dst+4, er1
564 
        mov.l   #0xdead:16, @-er1       ; Imm16, register pre-decr operands
565 
;;;     .word   0x7a7c
566 
;;;     .word   0xdead
567 
;;;     .word   0xb100
568 
 
569 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
570 
        test_neg_clear
571 
        test_zero_clear
572 
        test_ovf_clear
573 
        test_carry_clear
574 
 
575 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
576 
        test_h_gr32     long_dst, er1
577 
        test_gr_a5a5 2
578 
        test_gr_a5a5 3
579 
        test_gr_a5a5 4
580 
        test_gr_a5a5 5
581 
        test_gr_a5a5 6
582 
        test_gr_a5a5 7
583 
 
584 
        ;; Now check the result of the move to memory.
585 
        cmp.l   #0xdead, @long_dst
586 
        beq     .Lnext15
587 
        fail
588 
.Lnext15:
589 
        mov.l   #0, @long_dst    ; zero it again for the next use.
590 
 
591 
mov_l_imm16_to_disp2:
592 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
593 
        set_ccr_zero
594 
 
595 
        ;; mov.l #xx:16, @(dd:2, erd)
596 
        mov.l   #long_dst-12, er1
597 
        mov.l   #0xdead:16, @(12:2, er1)        ; Imm16, reg plus 2-bit disp. operand
598 
;;;     .word   0x7a7c
599 
;;;     .word   0xdead
600 
;;;     .word   0x3100
601 
 
602 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
603 
        test_neg_clear
604 
        test_zero_clear
605 
        test_ovf_clear
606 
        test_carry_clear
607 
 
608 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
609 
        test_h_gr32     long_dst-12, er1
610 
        test_gr_a5a5 2
611 
        test_gr_a5a5 3
612 
        test_gr_a5a5 4
613 
        test_gr_a5a5 5
614 
        test_gr_a5a5 6
615 
        test_gr_a5a5 7
616 
 
617 
        ;; Now check the result of the move to memory.
618 
        cmp.l   #0xdead, @long_dst
619 
        beq     .Lnext16
620 
        fail
621 
.Lnext16:
622 
        mov.l   #0, @long_dst    ; zero it again for the next use.
623 
 
624 
mov_l_imm16_to_disp16:
625 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
626 
        set_ccr_zero
627 
 
628 
        ;; mov.l #xx:16, @(dd:16, erd)
629 
        mov.l   #long_dst-4, er1
630 
        mov.l   #0xdead:16, @(4:16, er1)        ; Register plus 16-bit disp. operand
631 
;;;     .word   0x7a7c
632 
;;;     .word   0xdead
633 
;;;     .word   0xc100
634 
;;;     .word   0x0004
635 
 
636 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
637 
        test_neg_clear
638 
        test_zero_clear
639 
        test_ovf_clear
640 
        test_carry_clear
641 
 
642 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
643 
        test_h_gr32     long_dst-4, er1
644 
        test_gr_a5a5 2
645 
        test_gr_a5a5 3
646 
        test_gr_a5a5 4
647 
        test_gr_a5a5 5
648 
        test_gr_a5a5 6
649 
        test_gr_a5a5 7
650 
 
651 
        ;; Now check the result of the move to memory.
652 
        cmp.l   #0xdead, @long_dst
653 
        beq     .Lnext17
654 
        fail
655 
.Lnext17:
656 
        mov.l   #0, @long_dst    ; zero it again for the next use.
657 
 
658 
mov_l_imm16_to_disp32:
659 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
660 
        set_ccr_zero
661 
 
662 
        ;; mov.l #xx:16, @(dd:32, erd)
663 
        mov.l   #long_dst-8, er1
664 
        mov.l   #0xdead:16, @(8:32, er1)   ; Register plus 32-bit disp. operand
665 
;;;     .word   0x7a7c
666 
;;;     .word   0xdead
667 
;;;     .word   0xc900
668 
;;;     .long   8
669 
 
670 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
671 
        test_neg_clear
672 
        test_zero_clear
673 
        test_ovf_clear
674 
        test_carry_clear
675 
 
676 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
677 
        test_h_gr32     long_dst-8, er1
678 
        test_gr_a5a5 2
679 
        test_gr_a5a5 3
680 
        test_gr_a5a5 4
681 
        test_gr_a5a5 5
682 
        test_gr_a5a5 6
683 
        test_gr_a5a5 7
684 
 
685 
        ;; Now check the result of the move to memory.
686 
        cmp.l   #0xdead, @long_dst
687 
        beq     .Lnext18
688 
        fail
689 
.Lnext18:
690 
        mov.l   #0, @long_dst    ; zero it again for the next use.
691 
 
692 
mov_l_imm16_to_abs16:
693 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
694 
        set_ccr_zero
695 
 
696 
        ;; mov.l #xx:16, @aa:16
697 
        mov.l   #0xdead:16, @long_dst:16        ; 16-bit address-direct operand
698 
;;;     .word   0x7a7c
699 
;;;     .word   0xdead
700 
;;;     .word   0x4000
701 
;;;     .word   @long_dst
702 
 
703 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
704 
        test_neg_clear
705 
        test_zero_clear
706 
        test_ovf_clear
707 
        test_carry_clear
708 
 
709 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
710 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
711 
        test_gr_a5a5 2          ; to examine the destination memory).
712 
        test_gr_a5a5 3
713 
        test_gr_a5a5 4
714 
        test_gr_a5a5 5
715 
        test_gr_a5a5 6
716 
        test_gr_a5a5 7
717 
 
718 
        ;; Now check the result of the move to memory.
719 
        cmp.l   #0xdead, @long_dst
720 
        beq     .Lnext19
721 
        fail
722 
.Lnext19:
723 
        mov.l   #0, @long_dst    ; zero it again for the next use.
724 
 
725 
mov_l_imm16_to_abs32:
726 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
727 
        set_ccr_zero
728 
 
729 
        ;; mov.l #xx:16, @aa:32
730 
        mov.l   #0xdead:16, @long_dst:32        ; 32-bit address-direct operand
731 
;;;     .word   0x7a7c
732 
;;;     .word   0xdead
733 
;;;     .word   0x4800
734 
;;;     .long   @long_dst
735 
 
736 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
737 
        test_neg_clear
738 
        test_zero_clear
739 
        test_ovf_clear
740 
        test_carry_clear
741 
 
742 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
743 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
744 
        test_gr_a5a5 2          ; to examine the destination memory).
745 
        test_gr_a5a5 3
746 
        test_gr_a5a5 4
747 
        test_gr_a5a5 5
748 
        test_gr_a5a5 6
749 
        test_gr_a5a5 7
750 
 
751 
        ;; Now check the result of the move to memory.
752 
        cmp.l   #0xdead, @long_dst
753 
        beq     .Lnext20
754 
        fail
755 
.Lnext20:
756 
        mov.l   #0, @long_dst    ; zero it again for the next use.
757 
 
758 
mov_l_imm32_to_indirect:
759 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
760 
        set_ccr_zero
761 
 
762 
        ;; mov.l #xx:32, @erd
763 
        mov.l   #long_dst, er1
764 
        mov.l   #0xcafedead:32, @er1    ; Register indirect operand
765 
;;;     .word   0x7a74
766 
;;;     .long   0xcafedead
767 
;;;     .word   0x0100
768 
 
769 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
770 
        test_neg_set
771 
        test_zero_clear
772 
        test_ovf_clear
773 
        test_carry_clear
774 
 
775 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
776 
        test_h_gr32     long_dst, er1
777 
        test_gr_a5a5 2
778 
        test_gr_a5a5 3
779 
        test_gr_a5a5 4
780 
        test_gr_a5a5 5
781 
        test_gr_a5a5 6
782 
        test_gr_a5a5 7
783 
 
784 
        ;; Now check the result of the move to memory.
785 
        cmp.l   #0xcafedead, @long_dst
786 
        beq     .Lnext21
787 
        fail
788 
.Lnext21:
789 
        mov.l   #0, @long_dst    ; zero it again for the next use.
790 
 
791 
mov_l_imm32_to_postinc:         ; post-increment from imm32 to mem
792 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
793 
        set_ccr_zero
794 
 
795 
        ;; mov.l #xx:32, @erd+
796 
        mov.l   #long_dst, er1
797 
        mov.l   #0xcafedead:32, @er1+   ; Imm32, register post-incr operands.
798 
;;;     .word   0x7a74
799 
;;;     .long   0xcafedead
800 
;;;     .word   0x8100
801 
 
802 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
803 
        test_neg_set
804 
        test_zero_clear
805 
        test_ovf_clear
806 
        test_carry_clear
807 
 
808 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
809 
        test_h_gr32     long_dst+4, er1
810 
        test_gr_a5a5 2
811 
        test_gr_a5a5 3
812 
        test_gr_a5a5 4
813 
        test_gr_a5a5 5
814 
        test_gr_a5a5 6
815 
        test_gr_a5a5 7
816 
 
817 
        ;; Now check the result of the move to memory.
818 
        cmp.l   #0xcafedead, @long_dst
819 
        beq     .Lnext22
820 
        fail
821 
.Lnext22:
822 
        mov.l   #0, @long_dst    ; zero it again for the next use.
823 
 
824 
mov_l_imm32_to_postdec:         ; post-decrement from imm32 to mem
825 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
826 
        set_ccr_zero
827 
 
828 
        ;; mov.l #xx:32, @erd-
829 
        mov.l   #long_dst, er1
830 
        mov.l   #0xcafedead:32, @er1-   ; Imm32, register post-decr operands.
831 
;;;     .word   0x7a74
832 
;;;     .long   0xcafedead
833 
;;;     .word   0xa100
834 
 
835 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
836 
        test_neg_set
837 
        test_zero_clear
838 
        test_ovf_clear
839 
        test_carry_clear
840 
 
841 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
842 
        test_h_gr32     long_dst-4, er1
843 
        test_gr_a5a5 2
844 
        test_gr_a5a5 3
845 
        test_gr_a5a5 4
846 
        test_gr_a5a5 5
847 
        test_gr_a5a5 6
848 
        test_gr_a5a5 7
849 
 
850 
        ;; Now check the result of the move to memory.
851 
        cmp.l   #0xcafedead, @long_dst
852 
        beq     .Lnext23
853 
        fail
854 
.Lnext23:
855 
        mov.l   #0, @long_dst    ; zero it again for the next use.
856 
 
857 
mov_l_imm32_to_preinc:          ; pre-increment from register to mem
858 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
859 
        set_ccr_zero
860 
 
861 
        ;; mov.l #xx:32, @+erd
862 
        mov.l   #long_dst-4, er1
863 
        mov.l   #0xcafedead:32, @+er1   ; Imm32, register pre-incr operands
864 
;;;     .word   0x7a74
865 
;;;     .long   0xcafedead
866 
;;;     .word   0x9100
867 
 
868 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
869 
        test_neg_set
870 
        test_zero_clear
871 
        test_ovf_clear
872 
        test_carry_clear
873 
 
874 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
875 
        test_h_gr32     long_dst, er1
876 
        test_gr_a5a5 2
877 
        test_gr_a5a5 3
878 
        test_gr_a5a5 4
879 
        test_gr_a5a5 5
880 
        test_gr_a5a5 6
881 
        test_gr_a5a5 7
882 
 
883 
        ;; Now check the result of the move to memory.
884 
        cmp.l   #0xcafedead, @long_dst
885 
        beq     .Lnext24
886 
        fail
887 
.Lnext24:
888 
        mov.l   #0, @long_dst    ; zero it again for the next use.
889 
 
890 
mov_l_imm32_to_predec:          ; pre-decrement from register to mem
891 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
892 
        set_ccr_zero
893 
 
894 
        ;; mov.l #xx:32, @-erd
895 
        mov.l   #long_dst+4, er1
896 
        mov.l   #0xcafedead:32, @-er1   ; Imm32, register pre-decr operands
897 
;;;     .word   0x7a74
898 
;;;     .long   0xcafedead
899 
;;;     .word   0xb100
900 
 
901 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
902 
        test_neg_set
903 
        test_zero_clear
904 
        test_ovf_clear
905 
        test_carry_clear
906 
 
907 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
908 
        test_h_gr32     long_dst, er1
909 
        test_gr_a5a5 2
910 
        test_gr_a5a5 3
911 
        test_gr_a5a5 4
912 
        test_gr_a5a5 5
913 
        test_gr_a5a5 6
914 
        test_gr_a5a5 7
915 
 
916 
        ;; Now check the result of the move to memory.
917 
        cmp.l   #0xcafedead, @long_dst
918 
        beq     .Lnext25
919 
        fail
920 
.Lnext25:
921 
        mov.l   #0, @long_dst    ; zero it again for the next use.
922 
 
923 
mov_l_imm32_to_disp2:
924 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
925 
        set_ccr_zero
926 
 
927 
        ;; mov.l #xx:32, @(dd:2, erd)
928 
        mov.l   #long_dst-12, er1
929 
        mov.l   #0xcafedead:32, @(12:2, er1)    ; Imm32, reg plus 2-bit disp. operand
930 
;;;     .word   0x7a74
931 
;;;     .long   0xcafedead
932 
;;;     .word   0x3100
933 
 
934 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
935 
        test_neg_set
936 
        test_zero_clear
937 
        test_ovf_clear
938 
        test_carry_clear
939 
 
940 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
941 
        test_h_gr32     long_dst-12, er1
942 
        test_gr_a5a5 2
943 
        test_gr_a5a5 3
944 
        test_gr_a5a5 4
945 
        test_gr_a5a5 5
946 
        test_gr_a5a5 6
947 
        test_gr_a5a5 7
948 
 
949 
        ;; Now check the result of the move to memory.
950 
        cmp.l   #0xcafedead, @long_dst
951 
        beq     .Lnext26
952 
        fail
953 
.Lnext26:
954 
        mov.l   #0, @long_dst    ; zero it again for the next use.
955 
 
956 
mov_l_imm32_to_disp16:
957 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
958 
        set_ccr_zero
959 
 
960 
        ;; mov.l #xx:32, @(dd:16, erd)
961 
        mov.l   #long_dst-4, er1
962 
        mov.l   #0xcafedead:32, @(4:16, er1)    ; Register plus 16-bit disp. operand
963 
;;;     .word   0x7a74
964 
;;;     .long   0xcafedead
965 
;;;     .word   0xc100
966 
;;;     .word   0x0004
967 
 
968 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
969 
        test_neg_set
970 
        test_zero_clear
971 
        test_ovf_clear
972 
        test_carry_clear
973 
 
974 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
975 
        test_h_gr32     long_dst-4, er1
976 
        test_gr_a5a5 2
977 
        test_gr_a5a5 3
978 
        test_gr_a5a5 4
979 
        test_gr_a5a5 5
980 
        test_gr_a5a5 6
981 
        test_gr_a5a5 7
982 
 
983 
        ;; Now check the result of the move to memory.
984 
        cmp.l   #0xcafedead, @long_dst
985 
        beq     .Lnext27
986 
        fail
987 
.Lnext27:
988 
        mov.l   #0, @long_dst    ; zero it again for the next use.
989 
 
990 
mov_l_imm32_to_disp32:
991 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
992 
        set_ccr_zero
993 
 
994 
        ;; mov.l #xx:32, @(dd:32, erd)
995 
        mov.l   #long_dst-8, er1
996 
        mov.l   #0xcafedead:32, @(8:32, er1)   ; Register plus 32-bit disp. operand
997 
;;;     .word   0x7a74
998 
;;;     .long   0xcafedead
999 
;;;     .word   0xc900
1000 
;;;     .long   8
1001 
 
1002 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1003 
        test_neg_set
1004 
        test_zero_clear
1005 
        test_ovf_clear
1006 
        test_carry_clear
1007 
 
1008 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1009 
        test_h_gr32     long_dst-8, er1
1010 
        test_gr_a5a5 2
1011 
        test_gr_a5a5 3
1012 
        test_gr_a5a5 4
1013 
        test_gr_a5a5 5
1014 
        test_gr_a5a5 6
1015 
        test_gr_a5a5 7
1016 
 
1017 
        ;; Now check the result of the move to memory.
1018 
        cmp.l   #0xcafedead, @long_dst
1019 
        beq     .Lnext28
1020 
        fail
1021 
.Lnext28:
1022 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1023 
 
1024 
mov_l_imm32_to_abs16:
1025 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1026 
        set_ccr_zero
1027 
 
1028 
        ;; mov.l #xx:32, @aa:16
1029 
        mov.l   #0xcafedead:32, @long_dst:16    ; 16-bit address-direct operand
1030 
;;;     .word   0x7a74
1031 
;;;     .long   0xcafedead
1032 
;;;     .word   0x4000
1033 
;;;     .word   @long_dst
1034 
 
1035 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1036 
        test_neg_set
1037 
        test_zero_clear
1038 
        test_ovf_clear
1039 
        test_carry_clear
1040 
 
1041 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1042 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1043 
        test_gr_a5a5 2          ; to examine the destination memory).
1044 
        test_gr_a5a5 3
1045 
        test_gr_a5a5 4
1046 
        test_gr_a5a5 5
1047 
        test_gr_a5a5 6
1048 
        test_gr_a5a5 7
1049 
 
1050 
        ;; Now check the result of the move to memory.
1051 
        cmp.l   #0xcafedead, @long_dst
1052 
        beq     .Lnext29
1053 
        fail
1054 
.Lnext29:
1055 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1056 
 
1057 
mov_l_imm32_to_abs32:
1058 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1059 
        set_ccr_zero
1060 
 
1061 
        ;;  mov.l #xx:32, @aa:32
1062 
        mov.l   #0xcafedead:32, @long_dst:32    ; 32-bit address-direct operand
1063 
;;;     .word   0x7a74
1064 
;;;     .long   0xcafedead
1065 
;;;     .word   0x4800
1066 
;;;     .long   @long_dst
1067 
 
1068 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1069 
        test_neg_set
1070 
        test_zero_clear
1071 
        test_ovf_clear
1072 
        test_carry_clear
1073 
 
1074 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1075 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1076 
        test_gr_a5a5 2          ; to examine the destination memory).
1077 
        test_gr_a5a5 3
1078 
        test_gr_a5a5 4
1079 
        test_gr_a5a5 5
1080 
        test_gr_a5a5 6
1081 
        test_gr_a5a5 7
1082 
 
1083 
        ;; Now check the result of the move to memory.
1084 
        cmp.l   #0xcafedead, @long_dst
1085 
        beq     .Lnext30
1086 
        fail
1087 
.Lnext30:
1088 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1089 
 
1090 
.endif
1091 
 
1092 
        ;;
1093 
        ;; Move long from register source
1094 
        ;;
1095 
 
1096 
mov_l_reg32_to_reg32:
1097 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1098 
        set_ccr_zero
1099 
 
1100 
        ;; mov.l ers, erd
1101 
        mov.l   #0x12345678, er1
1102 
        mov.l   er1, er0        ; Register 32-bit operand
1103 
;;;     .word   0x0f90
1104 
 
1105 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1106 
        test_neg_clear
1107 
        test_zero_clear
1108 
        test_ovf_clear
1109 
        test_carry_clear
1110 
        test_h_gr32 0x12345678 er0
1111 
        test_h_gr32 0x12345678 er1      ; mov src unchanged
1112 
 
1113 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1114 
        test_gr_a5a5 3
1115 
        test_gr_a5a5 4
1116 
        test_gr_a5a5 5
1117 
        test_gr_a5a5 6
1118 
        test_gr_a5a5 7
1119 
 
1120 
mov_l_reg32_to_indirect:
1121 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1122 
        set_ccr_zero
1123 
 
1124 
        ;; mov.l ers, @erd
1125 
        mov.l   #long_dst, er1
1126 
        mov.l   er0, @er1       ; Register indirect operand
1127 
;;;     .word   0x0100
1128 
;;;     .word   0x6990
1129 
 
1130 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1131 
        test_neg_set
1132 
        test_zero_clear
1133 
        test_ovf_clear
1134 
        test_carry_clear
1135 
 
1136 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1137 
        test_h_gr32     long_dst, er1
1138 
        test_gr_a5a5 2
1139 
        test_gr_a5a5 3
1140 
        test_gr_a5a5 4
1141 
        test_gr_a5a5 5
1142 
        test_gr_a5a5 6
1143 
        test_gr_a5a5 7
1144 
 
1145 
        ;; Now check the result of the move to memory.
1146 
        mov.l   #0, er0
1147 
        mov.l   @long_dst, er0
1148 
        cmp.l   er2, er0
1149 
        beq     .Lnext44
1150 
        fail
1151 
.Lnext44:
1152 
        mov.l   #0, er0
1153 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1154 
 
1155 
.if (sim_cpu == h8sx)
1156 
mov_l_reg32_to_postinc:         ; post-increment from register to mem
1157 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1158 
        set_ccr_zero
1159 
 
1160 
        ;; mov.l ers, @erd+
1161 
        mov.l   #long_dst, er1
1162 
        mov.l   er0, @er1+      ; Register post-incr operand
1163 
;;;     .word   0x0103
1164 
;;;     .word   0x6d90
1165 
 
1166 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1167 
        test_neg_set
1168 
        test_zero_clear
1169 
        test_ovf_clear
1170 
        test_carry_clear
1171 
 
1172 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1173 
        test_h_gr32     long_dst+4, er1
1174 
        test_gr_a5a5 2
1175 
        test_gr_a5a5 3
1176 
        test_gr_a5a5 4
1177 
        test_gr_a5a5 5
1178 
        test_gr_a5a5 6
1179 
        test_gr_a5a5 7
1180 
 
1181 
        ;; Now check the result of the move to memory.
1182 
        cmp.l   er2, @long_dst
1183 
        beq     .Lnext49
1184 
        fail
1185 
.Lnext49:
1186 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1187 
 
1188 
mov_l_reg32_to_postdec:         ; post-decrement from register to mem
1189 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1190 
        set_ccr_zero
1191 
 
1192 
        ;; mov.l ers, @erd-
1193 
        mov.l   #long_dst, er1
1194 
        mov.l   er0, @er1-      ; Register post-decr operand
1195 
;;;     .word   0x0101
1196 
;;;     .word   0x6d90
1197 
 
1198 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1199 
        test_neg_set
1200 
        test_zero_clear
1201 
        test_ovf_clear
1202 
        test_carry_clear
1203 
 
1204 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1205 
        test_h_gr32     long_dst-4, er1
1206 
        test_gr_a5a5 2
1207 
        test_gr_a5a5 3
1208 
        test_gr_a5a5 4
1209 
        test_gr_a5a5 5
1210 
        test_gr_a5a5 6
1211 
        test_gr_a5a5 7
1212 
 
1213 
        ;; Now check the result of the move to memory.
1214 
        cmp.l   er2, @long_dst
1215 
        beq     .Lnext50
1216 
        fail
1217 
.Lnext50:
1218 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1219 
 
1220 
mov_l_reg32_to_preinc:          ; pre-increment from register to mem
1221 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1222 
        set_ccr_zero
1223 
 
1224 
        ;; mov.l ers, @+erd
1225 
        mov.l   #long_dst-4, er1
1226 
        mov.l   er0, @+er1      ; Register pre-incr operand
1227 
;;;     .word   0x0102
1228 
;;;     .word   0x6d90
1229 
 
1230 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1231 
        test_neg_set
1232 
        test_zero_clear
1233 
        test_ovf_clear
1234 
        test_carry_clear
1235 
 
1236 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1237 
        test_h_gr32     long_dst, er1
1238 
        test_gr_a5a5 2
1239 
        test_gr_a5a5 3
1240 
        test_gr_a5a5 4
1241 
        test_gr_a5a5 5
1242 
        test_gr_a5a5 6
1243 
        test_gr_a5a5 7
1244 
 
1245 
        ;; Now check the result of the move to memory.
1246 
        cmp.l   er2, @long_dst
1247 
        beq     .Lnext51
1248 
        fail
1249 
.Lnext51:
1250 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1251 
.endif                          ; h8sx
1252 
 
1253 
mov_l_reg32_to_predec:          ; pre-decrement from register to mem
1254 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1255 
        set_ccr_zero
1256 
 
1257 
        ;; mov.l ers, @-erd
1258 
        mov.l   #long_dst+4, er1
1259 
        mov.l   er0, @-er1      ; Register pre-decr operand
1260 
;;;     .word   0x0100
1261 
;;;     .word   0x6d90
1262 
 
1263 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1264 
        test_neg_set
1265 
        test_zero_clear
1266 
        test_ovf_clear
1267 
        test_carry_clear
1268 
 
1269 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1270 
        test_h_gr32     long_dst, er1
1271 
        test_gr_a5a5 2
1272 
        test_gr_a5a5 3
1273 
        test_gr_a5a5 4
1274 
        test_gr_a5a5 5
1275 
        test_gr_a5a5 6
1276 
        test_gr_a5a5 7
1277 
 
1278 
        ;; Now check the result of the move to memory.
1279 
        mov.l   #0, er0
1280 
        mov.l   @long_dst, er0
1281 
        cmp.l   er2, er0
1282 
        beq     .Lnext48
1283 
        fail
1284 
.Lnext48:
1285 
        mov.l   #0, er0
1286 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1287 
 
1288 
.if (sim_cpu == h8sx)
1289 
mov_l_reg32_to_disp2:
1290 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1291 
        set_ccr_zero
1292 
 
1293 
        ;; mov.l ers, @(dd:2, erd)
1294 
        mov.l   #long_dst-12, er1
1295 
        mov.l   er0, @(12:2, er1)       ; Register plus 2-bit disp. operand
1296 
;;;     .word   0x0103
1297 
;;;     .word   0x6990
1298 
 
1299 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1300 
        test_neg_set
1301 
        test_zero_clear
1302 
        test_ovf_clear
1303 
        test_carry_clear
1304 
 
1305 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1306 
        test_h_gr32     long_dst-12, er1
1307 
        test_gr_a5a5 2
1308 
        test_gr_a5a5 3
1309 
        test_gr_a5a5 4
1310 
        test_gr_a5a5 5
1311 
        test_gr_a5a5 6
1312 
        test_gr_a5a5 7
1313 
 
1314 
        ;; Now check the result of the move to memory.
1315 
        cmp.l   er2, @long_dst
1316 
        beq     .Lnext52
1317 
        fail
1318 
.Lnext52:
1319 
        mov.l   #0, @long_dst    ; zero it again for the next use.
1320 
.endif                          ; h8sx
1321 
 
1322 
mov_l_reg32_to_disp16:
1323 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1324 
        set_ccr_zero
1325 
 
1326 
        ;; mov.l ers, @(dd:16, erd)
1327 
        mov.l   #long_dst-4, er1
1328 
        mov.l   er0, @(4:16, er1)       ; Register plus 16-bit disp. operand
1329 
;;;     .word   0x0100
1330 
;;;     .word   0x6f90
1331 
;;;     .word   0x0004
1332 
 
1333 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1334 
        test_neg_set
1335 
        test_zero_clear
1336 
        test_ovf_clear
1337 
        test_carry_clear
1338 
 
1339 
        test_h_gr32     long_dst-4, er1
1340 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1341 
        test_gr_a5a5 2
1342 
        test_gr_a5a5 3
1343 
        test_gr_a5a5 4
1344 
        test_gr_a5a5 5
1345 
        test_gr_a5a5 6
1346 
        test_gr_a5a5 7
1347 
 
1348 
        ;; Now check the result of the move to memory.
1349 
        mov.l   #0, er0
1350 
        mov.l   @long_dst, er0
1351 
        cmp.l   er2, er0
1352 
        beq     .Lnext45
1353 
        fail
1354 
.Lnext45:
1355 
        mov.l   #0, er0
1356 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1357 
 
1358 
mov_l_reg32_to_disp32:
1359 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1360 
        set_ccr_zero
1361 
 
1362 
        ;; mov.l ers, @(dd:32, erd)
1363 
        mov.l   #long_dst-8, er1
1364 
        mov.l   er0, @(8:32, er1)       ; Register plus 32-bit disp. operand
1365 
;;;     .word   0x7890
1366 
;;;     .word   0x6ba0
1367 
;;;     .long   8
1368 
 
1369 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1370 
        test_neg_set
1371 
        test_zero_clear
1372 
        test_ovf_clear
1373 
        test_carry_clear
1374 
 
1375 
        test_h_gr32     long_dst-8, er1
1376 
        test_gr_a5a5 0           ; Make sure other general regs not disturbed
1377 
        test_gr_a5a5 2
1378 
        test_gr_a5a5 3
1379 
        test_gr_a5a5 4
1380 
        test_gr_a5a5 5
1381 
        test_gr_a5a5 6
1382 
        test_gr_a5a5 7
1383 
 
1384 
        ;; Now check the result of the move to memory.
1385 
        mov.l   #0, er0
1386 
        mov.l   @long_dst, er0
1387 
        cmp.l   er2, er0
1388 
        beq     .Lnext46
1389 
        fail
1390 
.Lnext46:
1391 
        mov.l   #0, er0
1392 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1393 
 
1394 
mov_l_reg32_to_abs16:
1395 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1396 
        set_ccr_zero
1397 
 
1398 
        ;; mov.l ers, @aa:16
1399 
        mov.l   er0, @long_dst:16       ; 16-bit address-direct operand
1400 
;;;     .word   0x0100
1401 
;;;     .word   0x6b80
1402 
;;;     .word   @long_dst
1403 
 
1404 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1405 
        test_neg_set
1406 
        test_zero_clear
1407 
        test_ovf_clear
1408 
        test_carry_clear
1409 
 
1410 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1411 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1412 
        test_gr_a5a5 2          ; to examine the destination memory).
1413 
        test_gr_a5a5 3
1414 
        test_gr_a5a5 4
1415 
        test_gr_a5a5 5
1416 
        test_gr_a5a5 6
1417 
        test_gr_a5a5 7
1418 
 
1419 
        ;; Now check the result of the move to memory.
1420 
        mov.l   #0, er0
1421 
        mov.l   @long_dst, er0
1422 
        cmp.l   er0, er1
1423 
        beq     .Lnext41
1424 
        fail
1425 
.Lnext41:
1426 
        mov.l   #0, er0
1427 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1428 
 
1429 
mov_l_reg32_to_abs32:
1430 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1431 
        set_ccr_zero
1432 
 
1433 
        ;; mov.l ers, @aa:32
1434 
        mov.l   er0, @long_dst:32       ; 32-bit address-direct operand
1435 
;;;     .word   0x0100
1436 
;;;     .word   0x6ba0
1437 
;;;     .long   @long_dst
1438 
 
1439 
        ;; test ccr             ; H=0 N=1 Z=0 V=0 C=0
1440 
        test_neg_set
1441 
        test_zero_clear
1442 
        test_ovf_clear
1443 
        test_carry_clear
1444 
 
1445 
        test_gr_a5a5 0           ; Make sure _ALL_ general regs not disturbed
1446 
        test_gr_a5a5 1          ; (first, because on h8/300 we must use one
1447 
        test_gr_a5a5 2          ; to examine the destination memory).
1448 
        test_gr_a5a5 3
1449 
        test_gr_a5a5 4
1450 
        test_gr_a5a5 5
1451 
        test_gr_a5a5 6
1452 
        test_gr_a5a5 7
1453 
 
1454 
        ;; Now check the result of the move to memory.
1455 
        mov.l   #0, er0
1456 
        mov.l   @long_dst, er0
1457 
        cmp.l   er0, er1
1458 
        beq     .Lnext42
1459 
        fail
1460 
.Lnext42:
1461 
        mov.l   #0, er0
1462 
        mov.l   er0, @long_dst  ; zero it again for the next use.
1463 
 
1464 
        ;;
1465 
        ;; Move long to register destination.
1466 
        ;;
1467 
 
1468 
mov_l_indirect_to_reg32:
1469 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1470 
        set_ccr_zero
1471 
 
1472 
        ;; mov.l @ers, erd
1473 
        mov.l   #long_src, er1
1474 
        mov.l   @er1, er0       ; Register indirect operand
1475 
;;;     .word   0x0100
1476 
;;;     .word   0x6910
1477 
 
1478 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1479 
        test_neg_clear
1480 
        test_zero_clear
1481 
        test_ovf_clear
1482 
        test_carry_clear
1483 
 
1484 
        test_h_gr32 0x77777777 er0
1485 
 
1486 
        test_h_gr32     long_src, er1
1487 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1488 
        test_gr_a5a5 3
1489 
        test_gr_a5a5 4
1490 
        test_gr_a5a5 5
1491 
        test_gr_a5a5 6
1492 
        test_gr_a5a5 7
1493 
 
1494 
mov_l_postinc_to_reg32:         ; post-increment from mem to register
1495 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1496 
        set_ccr_zero
1497 
 
1498 
        ;; mov.l @ers+, erd
1499 
 
1500 
        mov.l   #long_src, er1
1501 
        mov.l   @er1+, er0      ; Register post-incr operand
1502 
;;;     .word   0x0100
1503 
;;;     .word   0x6d10
1504 
 
1505 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1506 
        test_neg_clear
1507 
        test_zero_clear
1508 
        test_ovf_clear
1509 
        test_carry_clear
1510 
 
1511 
        test_h_gr32 0x77777777 er0
1512 
 
1513 
        test_h_gr32     long_src+4, er1
1514 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1515 
        test_gr_a5a5 3
1516 
        test_gr_a5a5 4
1517 
        test_gr_a5a5 5
1518 
        test_gr_a5a5 6
1519 
        test_gr_a5a5 7
1520 
 
1521 
.if (sim_cpu == h8sx)
1522 
mov_l_postdec_to_reg32:         ; post-decrement from mem to register
1523 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1524 
        set_ccr_zero
1525 
 
1526 
        ;; mov.l @ers-, erd
1527 
 
1528 
        mov.l   #long_src, er1
1529 
        mov.l   @er1-, er0      ; Register post-decr operand
1530 
;;;     .word   0x0102
1531 
;;;     .word   0x6d10
1532 
 
1533 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1534 
        test_neg_clear
1535 
        test_zero_clear
1536 
        test_ovf_clear
1537 
        test_carry_clear
1538 
 
1539 
        test_h_gr32 0x77777777 er0
1540 
 
1541 
        test_h_gr32     long_src-4, er1
1542 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1543 
        test_gr_a5a5 3
1544 
        test_gr_a5a5 4
1545 
        test_gr_a5a5 5
1546 
        test_gr_a5a5 6
1547 
        test_gr_a5a5 7
1548 
 
1549 
mov_l_preinc_to_reg32:          ; pre-increment from mem to register
1550 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1551 
        set_ccr_zero
1552 
 
1553 
        ;; mov.l @+ers, erd
1554 
 
1555 
        mov.l   #long_src-4, er1
1556 
        mov.l   @+er1, er0      ; Register pre-incr operand
1557 
;;;     .word   0x0101
1558 
;;;     .word   0x6d10
1559 
 
1560 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1561 
        test_neg_clear
1562 
        test_zero_clear
1563 
        test_ovf_clear
1564 
        test_carry_clear
1565 
 
1566 
        test_h_gr32 0x77777777 er0
1567 
 
1568 
        test_h_gr32     long_src, er1
1569 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1570 
        test_gr_a5a5 3
1571 
        test_gr_a5a5 4
1572 
        test_gr_a5a5 5
1573 
        test_gr_a5a5 6
1574 
        test_gr_a5a5 7
1575 
 
1576 
mov_l_predec_to_reg32:          ; pre-decrement from mem to register
1577 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1578 
        set_ccr_zero
1579 
 
1580 
        ;; mov.l @-ers, erd
1581 
 
1582 
        mov.l   #long_src+4, er1
1583 
        mov.l   @-er1, er0      ; Register pre-decr operand
1584 
;;;     .word   0x0103
1585 
;;;     .word   0x6d10
1586 
 
1587 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1588 
        test_neg_clear
1589 
        test_zero_clear
1590 
        test_ovf_clear
1591 
        test_carry_clear
1592 
 
1593 
        test_h_gr32 0x77777777 er0
1594 
 
1595 
        test_h_gr32     long_src, er1
1596 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1597 
        test_gr_a5a5 3
1598 
        test_gr_a5a5 4
1599 
        test_gr_a5a5 5
1600 
        test_gr_a5a5 6
1601 
        test_gr_a5a5 7
1602 
 
1603 
 
1604 
mov_l_disp2_to_reg32:
1605 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1606 
        set_ccr_zero
1607 
 
1608 
        ;; mov.l @(dd:2, ers), erd
1609 
        mov.l   #long_src-4, er1
1610 
        mov.l   @(4:2, er1), er0        ; Register plus 2-bit disp. operand
1611 
;;;     .word   0x0101
1612 
;;;     .word   0x6910
1613 
 
1614 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1615 
        test_neg_clear
1616 
        test_zero_clear
1617 
        test_ovf_clear
1618 
        test_carry_clear
1619 
 
1620 
        test_h_gr32 0x77777777 er0      ; mov result:   a5a5 | 7777
1621 
 
1622 
        test_h_gr32     long_src-4, er1
1623 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1624 
        test_gr_a5a5 3
1625 
        test_gr_a5a5 4
1626 
        test_gr_a5a5 5
1627 
        test_gr_a5a5 6
1628 
        test_gr_a5a5 7
1629 
.endif                          ; h8sx
1630 
 
1631 
mov_l_disp16_to_reg32:
1632 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1633 
        set_ccr_zero
1634 
 
1635 
        ;; mov.l @(dd:16, ers), erd
1636 
        mov.l   #long_src+0x1234, er1
1637 
        mov.l   @(-0x1234:16, er1), er0 ; Register plus 16-bit disp. operand
1638 
;;;     .word   0x0100
1639 
;;;     .word   0x6f10
1640 
;;;     .word   -0x1234
1641 
 
1642 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1643 
        test_neg_clear
1644 
        test_zero_clear
1645 
        test_ovf_clear
1646 
        test_carry_clear
1647 
 
1648 
        test_h_gr32 0x77777777 er0      ; mov result:   a5a5 | 7777
1649 
 
1650 
        test_h_gr32     long_src+0x1234, er1
1651 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1652 
        test_gr_a5a5 3
1653 
        test_gr_a5a5 4
1654 
        test_gr_a5a5 5
1655 
        test_gr_a5a5 6
1656 
        test_gr_a5a5 7
1657 
 
1658 
mov_l_disp32_to_reg32:
1659 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1660 
        set_ccr_zero
1661 
 
1662 
        ;; mov.l @(dd:32, ers), erd
1663 
        mov.l   #long_src+65536, er1
1664 
        mov.l   @(-65536:32, er1), er0  ; Register plus 32-bit disp. operand
1665 
;;;     .word   0x7890
1666 
;;;     .word   0x6b20
1667 
;;;     .long   -65536
1668 
 
1669 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1670 
        test_neg_clear
1671 
        test_zero_clear
1672 
        test_ovf_clear
1673 
        test_carry_clear
1674 
 
1675 
        test_h_gr32 0x77777777 er0      ; mov result:   a5a5 | 7777
1676 
 
1677 
        test_h_gr32     long_src+65536, er1
1678 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1679 
        test_gr_a5a5 3
1680 
        test_gr_a5a5 4
1681 
        test_gr_a5a5 5
1682 
        test_gr_a5a5 6
1683 
        test_gr_a5a5 7
1684 
 
1685 
mov_l_abs16_to_reg32:
1686 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1687 
        set_ccr_zero
1688 
 
1689 
        ;; mov.l @aa:16, erd
1690 
        mov.l   @long_src:16, er0       ; 16-bit address-direct operand
1691 
;;;     .word   0x0100
1692 
;;;     .word   0x6b00
1693 
;;;     .word   @long_src
1694 
 
1695 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1696 
        test_neg_clear
1697 
        test_zero_clear
1698 
        test_ovf_clear
1699 
        test_carry_clear
1700 
 
1701 
        test_h_gr32 0x77777777 er0
1702 
 
1703 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
1704 
        test_gr_a5a5 2
1705 
        test_gr_a5a5 3
1706 
        test_gr_a5a5 4
1707 
        test_gr_a5a5 5
1708 
        test_gr_a5a5 6
1709 
        test_gr_a5a5 7
1710 
 
1711 
mov_l_abs32_to_reg32:
1712 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1713 
        set_ccr_zero
1714 
 
1715 
        ;; mov.l @aa:32, erd
1716 
        mov.l   @long_src:32, er0       ; 32-bit address-direct operand
1717 
;;;     .word   0x0100
1718 
;;;     .word   0x6b20
1719 
;;;     .long   @long_src
1720 
 
1721 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1722 
        test_neg_clear
1723 
        test_zero_clear
1724 
        test_ovf_clear
1725 
        test_carry_clear
1726 
 
1727 
        test_h_gr32 0x77777777 er0
1728 
 
1729 
        test_gr_a5a5 1          ; Make sure other general regs not disturbed
1730 
        test_gr_a5a5 2
1731 
        test_gr_a5a5 3
1732 
        test_gr_a5a5 4
1733 
        test_gr_a5a5 5
1734 
        test_gr_a5a5 6
1735 
        test_gr_a5a5 7
1736 
 
1737 
 
1738 
.if (sim_cpu == h8sx)
1739 
 
1740 
        ;;
1741 
        ;; Move long from memory to memory
1742 
        ;;
1743 
 
1744 
mov_l_indirect_to_indirect:     ; reg indirect, memory to memory
1745 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1746 
        set_ccr_zero
1747 
 
1748 
        ;; mov.l @ers, @erd
1749 
 
1750 
        mov.l   #long_src, er1
1751 
        mov.l   #long_dst, er0
1752 
        mov.l   @er1, @er0
1753 
;;;     .word   0x0108
1754 
;;;     .word   0x0100
1755 
 
1756 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1757 
        test_neg_clear
1758 
        test_zero_clear
1759 
        test_ovf_clear
1760 
        test_carry_clear
1761 
 
1762 
        ;; Verify the affected registers.
1763 
 
1764 
        test_h_gr32  long_dst er0
1765 
        test_h_gr32  long_src er1
1766 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1767 
        test_gr_a5a5 3
1768 
        test_gr_a5a5 4
1769 
        test_gr_a5a5 5
1770 
        test_gr_a5a5 6
1771 
        test_gr_a5a5 7
1772 
 
1773 
        ;; Now check the result of the move to memory.
1774 
        cmp.l   @long_src, @long_dst
1775 
        beq     .Lnext55
1776 
        fail
1777 
.Lnext55:
1778 
        ;; Now clear the destination location, and verify that.
1779 
        mov.l   #0, @long_dst
1780 
        cmp.l   @long_src, @long_dst
1781 
        bne     .Lnext56
1782 
        fail
1783 
.Lnext56:                       ; OK, pass on.
1784 
 
1785 
mov_l_postinc_to_postinc:       ; reg post-increment, memory to memory
1786 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1787 
        set_ccr_zero
1788 
 
1789 
        ;; mov.l @ers+, @erd+
1790 
 
1791 
        mov.l   #long_src, er1
1792 
        mov.l   #long_dst, er0
1793 
        mov.l   @er1+, @er0+
1794 
;;;     .word   0x0108
1795 
;;;     .word   0x8180
1796 
 
1797 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1798 
        test_neg_clear
1799 
        test_zero_clear
1800 
        test_ovf_clear
1801 
        test_carry_clear
1802 
 
1803 
        ;; Verify the affected registers.
1804 
 
1805 
        test_h_gr32  long_dst+4 er0
1806 
        test_h_gr32  long_src+4 er1
1807 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1808 
        test_gr_a5a5 3
1809 
        test_gr_a5a5 4
1810 
        test_gr_a5a5 5
1811 
        test_gr_a5a5 6
1812 
        test_gr_a5a5 7
1813 
 
1814 
        ;; Now check the result of the move to memory.
1815 
        cmp.l   @long_src, @long_dst
1816 
        beq     .Lnext65
1817 
        fail
1818 
.Lnext65:
1819 
        ;; Now clear the destination location, and verify that.
1820 
        mov.l   #0, @long_dst
1821 
        cmp.l   @long_src, @long_dst
1822 
        bne     .Lnext66
1823 
        fail
1824 
.Lnext66:                       ; OK, pass on.
1825 
 
1826 
mov_l_postdec_to_postdec:       ; reg post-decrement, memory to memory
1827 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1828 
        set_ccr_zero
1829 
 
1830 
        ;; mov.l @ers-, @erd-
1831 
 
1832 
        mov.l   #long_src, er1
1833 
        mov.l   #long_dst, er0
1834 
        mov.l   @er1-, @er0-
1835 
;;;     .word   0x0108
1836 
;;;     .word   0xa1a0
1837 
 
1838 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1839 
        test_neg_clear
1840 
        test_zero_clear
1841 
        test_ovf_clear
1842 
        test_carry_clear
1843 
 
1844 
        ;; Verify the affected registers.
1845 
 
1846 
        test_h_gr32  long_dst-4 er0
1847 
        test_h_gr32  long_src-4 er1
1848 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1849 
        test_gr_a5a5 3
1850 
        test_gr_a5a5 4
1851 
        test_gr_a5a5 5
1852 
        test_gr_a5a5 6
1853 
        test_gr_a5a5 7
1854 
 
1855 
        ;; Now check the result of the move to memory.
1856 
        cmp.l   @long_src, @long_dst
1857 
        beq     .Lnext75
1858 
        fail
1859 
.Lnext75:
1860 
        ;; Now clear the destination location, and verify that.
1861 
        mov.l   #0, @long_dst
1862 
        cmp.l   @long_src, @long_dst
1863 
        bne     .Lnext76
1864 
        fail
1865 
.Lnext76:                       ; OK, pass on.
1866 
 
1867 
mov_l_preinc_to_preinc:         ; reg pre-increment, memory to memory
1868 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1869 
        set_ccr_zero
1870 
 
1871 
        ;; mov.l @+ers, @+erd
1872 
 
1873 
        mov.l   #long_src-4, er1
1874 
        mov.l   #long_dst-4, er0
1875 
        mov.l   @+er1, @+er0
1876 
;;;     .word   0x0108
1877 
;;;     .word   0x9190
1878 
 
1879 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1880 
        test_neg_clear
1881 
        test_zero_clear
1882 
        test_ovf_clear
1883 
        test_carry_clear
1884 
 
1885 
        ;; Verify the affected registers.
1886 
 
1887 
        test_h_gr32  long_dst er0
1888 
        test_h_gr32  long_src er1
1889 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1890 
        test_gr_a5a5 3
1891 
        test_gr_a5a5 4
1892 
        test_gr_a5a5 5
1893 
        test_gr_a5a5 6
1894 
        test_gr_a5a5 7
1895 
 
1896 
        ;; Now check the result of the move to memory.
1897 
        cmp.l   @long_src, @long_dst
1898 
        beq     .Lnext85
1899 
        fail
1900 
.Lnext85:
1901 
        ;; Now clear the destination location, and verify that.
1902 
        mov.l   #0, @long_dst
1903 
        cmp.l   @long_src, @long_dst
1904 
        bne     .Lnext86
1905 
        fail
1906 
.Lnext86:                               ; OK, pass on.
1907 
 
1908 
mov_l_predec_to_predec:         ; reg pre-decrement, memory to memory
1909 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1910 
        set_ccr_zero
1911 
 
1912 
        ;; mov.l @-ers, @-erd
1913 
 
1914 
        mov.l   #long_src+4, er1
1915 
        mov.l   #long_dst+4, er0
1916 
        mov.l   @-er1, @-er0
1917 
;;;     .word   0x0108
1918 
;;;     .word   0xb1b0
1919 
 
1920 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1921 
        test_neg_clear
1922 
        test_zero_clear
1923 
        test_ovf_clear
1924 
        test_carry_clear
1925 
 
1926 
        ;; Verify the affected registers.
1927 
 
1928 
        test_h_gr32  long_dst er0
1929 
        test_h_gr32  long_src er1
1930 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1931 
        test_gr_a5a5 3
1932 
        test_gr_a5a5 4
1933 
        test_gr_a5a5 5
1934 
        test_gr_a5a5 6
1935 
        test_gr_a5a5 7
1936 
 
1937 
        ;; Now check the result of the move to memory.
1938 
        cmp.l   @long_src, @long_dst
1939 
        beq     .Lnext95
1940 
        fail
1941 
.Lnext95:
1942 
        ;; Now clear the destination location, and verify that.
1943 
        mov.l   #0, @long_dst
1944 
        cmp.l   @long_src, @long_dst
1945 
        bne     .Lnext96
1946 
        fail
1947 
.Lnext96:                       ; OK, pass on.
1948 
 
1949 
mov_l_disp2_to_disp2:           ; reg 2-bit disp, memory to memory
1950 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1951 
        set_ccr_zero
1952 
 
1953 
        ;; mov.l @(dd:2, ers), @(dd:2, erd)
1954 
 
1955 
        mov.l   #long_src-4, er1
1956 
        mov.l   #long_dst-8, er0
1957 
        mov.l   @(4:2, er1), @(8:2, er0)
1958 
;;;     .word   0x0108
1959 
;;;     .word   0x1120
1960 
 
1961 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
1962 
        test_neg_clear
1963 
        test_zero_clear
1964 
        test_ovf_clear
1965 
        test_carry_clear
1966 
 
1967 
        ;; Verify the affected registers.
1968 
 
1969 
        test_h_gr32  long_dst-8 er0
1970 
        test_h_gr32  long_src-4 er1
1971 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
1972 
        test_gr_a5a5 3
1973 
        test_gr_a5a5 4
1974 
        test_gr_a5a5 5
1975 
        test_gr_a5a5 6
1976 
        test_gr_a5a5 7
1977 
 
1978 
        ;; Now check the result of the move to memory.
1979 
        cmp.l   @long_src, @long_dst
1980 
        beq     .Lnext105
1981 
        fail
1982 
.Lnext105:
1983 
        ;; Now clear the destination location, and verify that.
1984 
        mov.l   #0, @long_dst
1985 
        cmp.l   @long_src, @long_dst
1986 
        bne     .Lnext106
1987 
        fail
1988 
.Lnext106:                      ; OK, pass on.
1989 
 
1990 
mov_l_disp16_to_disp16:         ; reg 16-bit disp, memory to memory
1991 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
1992 
        set_ccr_zero
1993 
 
1994 
        ;; mov.l @(dd:16, ers), @(dd:16, erd)
1995 
 
1996 
        mov.l   #long_src-1, er1
1997 
        mov.l   #long_dst-2, er0
1998 
        mov.l   @(1:16, er1), @(2:16, er0)
1999 
;;;     .word   0x0108
2000 
;;;     .word   0xc1c0
2001 
;;;     .word   0x0001
2002 
;;;     .word   0x0002
2003 
 
2004 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
2005 
        test_neg_clear
2006 
        test_zero_clear
2007 
        test_ovf_clear
2008 
        test_carry_clear
2009 
 
2010 
        ;; Verify the affected registers.
2011 
 
2012 
        test_h_gr32  long_dst-2 er0
2013 
        test_h_gr32  long_src-1 er1
2014 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
2015 
        test_gr_a5a5 3
2016 
        test_gr_a5a5 4
2017 
        test_gr_a5a5 5
2018 
        test_gr_a5a5 6
2019 
        test_gr_a5a5 7
2020 
 
2021 
        ;; Now check the result of the move to memory.
2022 
        cmp.l   @long_src, @long_dst
2023 
        beq     .Lnext115
2024 
        fail
2025 
.Lnext115:
2026 
        ;; Now clear the destination location, and verify that.
2027 
        mov.l   #0, @long_dst
2028 
        cmp.l   @long_src, @long_dst
2029 
        bne     .Lnext116
2030 
        fail
2031 
.Lnext116:                      ; OK, pass on.
2032 
 
2033 
mov_l_disp32_to_disp32:         ; reg 32-bit disp, memory to memory
2034 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
2035 
        set_ccr_zero
2036 
 
2037 
        ;; mov.l @(dd:32, ers), @(dd:32, erd)
2038 
 
2039 
        mov.l   #long_src-1, er1
2040 
        mov.l   #long_dst-2, er0
2041 
        mov.l   @(1:32, er1), @(2:32, er0)
2042 
;;;     .word   0x0108
2043 
;;;     .word   0xc9c8
2044 
;;;     .long   1
2045 
;;;     .long   2
2046 
 
2047 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
2048 
        test_neg_clear
2049 
        test_zero_clear
2050 
        test_ovf_clear
2051 
        test_carry_clear
2052 
 
2053 
        ;; Verify the affected registers.
2054 
 
2055 
        test_h_gr32  long_dst-2 er0
2056 
        test_h_gr32  long_src-1 er1
2057 
        test_gr_a5a5 2          ; Make sure other general regs not disturbed
2058 
        test_gr_a5a5 3
2059 
        test_gr_a5a5 4
2060 
        test_gr_a5a5 5
2061 
        test_gr_a5a5 6
2062 
        test_gr_a5a5 7
2063 
 
2064 
        ;; Now check the result of the move to memory.
2065 
        cmp.l   @long_src, @long_dst
2066 
        beq     .Lnext125
2067 
        fail
2068 
.Lnext125:
2069 
        ;; Now clear the destination location, and verify that.
2070 
        mov.l   #0, @long_dst
2071 
        cmp.l   @long_src, @long_dst
2072 
        bne     .Lnext126
2073 
        fail
2074 
.Lnext126:                              ; OK, pass on.
2075 
 
2076 
mov_l_abs16_to_abs16:           ; 16-bit absolute addr, memory to memory
2077 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
2078 
        set_ccr_zero
2079 
 
2080 
        ;; mov.l @aa:16, @aa:16
2081 
 
2082 
        mov.l   @long_src:16, @long_dst:16
2083 
;;;     .word   0x0108
2084 
;;;     .word   0x4040
2085 
;;;     .word   @long_src
2086 
;;;     .word   @long_dst
2087 
 
2088 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
2089 
        test_neg_clear
2090 
        test_zero_clear
2091 
        test_ovf_clear
2092 
        test_carry_clear
2093 
 
2094 
 
2095 
        test_gr_a5a5 0           ; Make sure *NO* general registers are changed
2096 
        test_gr_a5a5 1
2097 
        test_gr_a5a5 2
2098 
        test_gr_a5a5 3
2099 
        test_gr_a5a5 4
2100 
        test_gr_a5a5 5
2101 
        test_gr_a5a5 6
2102 
        test_gr_a5a5 7
2103 
 
2104 
        ;; Now check the result of the move to memory.
2105 
        cmp.l   @long_src, @long_dst
2106 
        beq     .Lnext135
2107 
        fail
2108 
.Lnext135:
2109 
        ;; Now clear the destination location, and verify that.
2110 
        mov.l   #0, @long_dst
2111 
        cmp.l   @long_src, @long_dst
2112 
        bne     .Lnext136
2113 
        fail
2114 
.Lnext136:                              ; OK, pass on.
2115 
 
2116 
mov_l_abs32_to_abs32:           ; 32-bit absolute addr, memory to memory
2117 
        set_grs_a5a5            ; Fill all general regs with a fixed pattern
2118 
        set_ccr_zero
2119 
 
2120 
        ;; mov.l @aa:32, @aa:32
2121 
 
2122 
        mov.l   @long_src:32, @long_dst:32
2123 
;;;     .word   0x0108
2124 
;;;     .word   0x4848
2125 
;;;     .long   @long_src
2126 
;;;     .long   @long_dst
2127 
 
2128 
        ;; test ccr             ; H=0 N=0 Z=0 V=0 C=0
2129 
        test_neg_clear
2130 
        test_zero_clear
2131 
        test_ovf_clear
2132 
        test_carry_clear
2133 
 
2134 
        test_gr_a5a5 0           ; Make sure *NO* general registers are changed
2135 
        test_gr_a5a5 1
2136 
        test_gr_a5a5 2
2137 
        test_gr_a5a5 3
2138 
        test_gr_a5a5 4
2139 
        test_gr_a5a5 5
2140 
        test_gr_a5a5 6
2141 
        test_gr_a5a5 7
2142 
 
2143 
        ;; Now check the result of the move to memory.
2144 
        cmp.l   @long_src, @long_dst
2145 
        beq     .Lnext145
2146 
        fail
2147 
.Lnext145:
2148 
        ;; Now clear the destination location, and verify that.
2149 
        mov.l   #0, @long_dst
2150 
        cmp.l   @long_src, @long_dst
2151 
        bne     .Lnext146
2152 
        fail
2153 
.Lnext146:                              ; OK, pass on.
2154 
 
2155 
 
2156 
.endif
2157 
 
2158 
        pass
2159 
 
2160 
        exit 0

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