OpenCores
URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [testutils.inc] - Blame information for rev 26

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 26 jlechner
# r0-r3 are used as tmps, consider them call clobbered by these macros.
2
 
3
        .macro start
4
        .data
5
failmsg:
6
        .ascii "fail\n"
7
passmsg:
8
        .ascii "pass\n"
9
        .text
10
        .global _start
11
_start:
12
        .endm
13
 
14
        .macro exit rc
15
        ldi8 r1, \rc
16
        ldi8 r0, #1
17
        trap #0
18
        .endm
19
 
20
        .macro pass
21
        ldi8 r3, 5
22
        ld24 r2, passmsg
23
        ldi8 r1, 1
24
        ldi8 r0, 5
25
        trap #0
26
        exit 0
27
        .endm
28
 
29
        .macro fail
30
        ldi8 r3, 5
31
        ld24 r2, failmsg
32
        ldi8 r1, 1
33
        ldi8 r0, 5
34
        trap #0
35
        exit 1
36
        .endm
37
 
38
        .macro mvi_h_gr reg, val
39
        .if (\val >= -128) && (\val <= 127)
40
        ldi8 \reg, \val
41
        .else
42
        seth \reg, high(\val)
43
        or3 \reg, \reg, low(\val)
44
        .endif
45
        .endm
46
 
47
        .macro mvaddr_h_gr reg, addr
48
        seth \reg, high(\addr)
49
        or3 \reg, \reg, low(\addr)
50
        .endm
51
 
52
# Other macros know this only clobbers r0.
53
        .macro test_h_gr reg, val
54
        mvaddr_h_gr r0, \val
55
        beq \reg, r0, test_gr\@
56
        fail
57
test_gr\@:
58
        .endm
59
 
60
        .macro mvi_h_condbit val
61
        ldi8 r0, 0
62
        ldi8 r1, 1
63
        .if \val
64
        cmp r0, r1
65
        .else
66
        cmp r1, r0
67
        .endif
68
        .endm
69
 
70
        .macro test_h_condbit val
71
        .if \val
72
        bc test_c1\@
73
        fail
74
test_c1\@:
75
        .else
76
        bnc test_c0\@
77
        fail
78
test_c0\@:
79
        .endif
80
        .endm
81
 
82
        .macro mvi_h_accum0 hi, lo
83
        mvi_h_gr r0, \hi
84
        mvtachi r0
85
        mvi_h_gr r0, \lo
86
        mvtaclo r0
87
        .endm
88
 
89
        .macro test_h_accum0 hi, lo
90
        mvfachi r1
91
        test_h_gr r1, \hi
92
        mvfaclo r1
93
        test_h_gr r1, \lo
94
        .endm
95
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.