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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [frchg.s] - Blame information for rev 26

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# sh testcase for frchg
# mach: sh
# as(sh):       -defsym sim_cpu=0
 
        .include "testutils.inc"
 
        start
        set_grs_a5a5
        set_fprs_a5a5
        sts     fpscr, r0
        assertreg0      0
        frchg
        sts     fpscr, r0
        assertreg0      0x200000
        frchg
        sts     fpscr, r0
        assertreg0      0
        frchg
        sts     fpscr, r0
        assertreg0      0x200000
        frchg
        sts     fpscr, r0
        assertreg0      0
 
        set_greg        0xa5a5a5a5, r0
        test_grs_a5a5
        test_fprs_a5a5
 
        pass
        exit 0

Line No.	Rev	Author	Line
1	26	jlechner	`# sh testcase for frchg`
2			`# mach: sh`
3			`# as(sh): -defsym sim_cpu=0`
4
5			`.include "testutils.inc"`
6
7			`start`
8			`set_grs_a5a5`
9			`set_fprs_a5a5`
10			`sts fpscr, r0`
11			`assertreg0 0`
12			`frchg`
13			`sts fpscr, r0`
14			`assertreg0 0x200000`
15			`frchg`
16			`sts fpscr, r0`
17			`assertreg0 0`
18			`frchg`
19			`sts fpscr, r0`
20			`assertreg0 0x200000`
21			`frchg`
22			`sts fpscr, r0`
23			`assertreg0 0`
24
25			`set_greg 0xa5a5a5a5, r0`
26			`test_grs_a5a5`
27			`test_fprs_a5a5`
28
29			`pass`
30			`exit 0`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [frchg.s] - Blame information for rev 26