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# sh testcase for pand
# mach:  shdsp
# as(shdsp):    -defsym sim_cpu=1 -dsp
 
        .include "testutils.inc"
 
        start
        set_grs_a5a5
        lds     r0, a0
        pcopy   a0, a1
        lds     r0, x0
        lds     r0, x1
        lds     r0, y0
        lds     r0, y1
        pcopy   x0, m0
        pcopy   y1, m1
 
        pand    x0, y0, a0
        assert_sreg     0xa5a50000, a0
 
        # 0xa5a5a5a5 & 0x5a5a5a5a == 0
        set_greg        0x5a5a5a5a r0
        lds     r0, x0
        pand    x0, y0, a0
        assert_sreg     0, a0
 
        set_dcfalse
        dct pand x0, y0, m0
        assert_sreg2    0xa5a5a5a5, m0
        set_dctrue
        dct pand x0, y0, m0
        assert_sreg2    0, m0
 
        set_dctrue
        dcf pand x0, y0, m1
        assert_sreg2    0xa5a5a5a5, m1
        set_dcfalse
        dcf pand x0, y0, m1
        assert_sreg2    0, m1
 
        set_greg        0xa5a5a5a5, r0
        test_grs_a5a5
        assert_sreg     0xa5a5a5a5, x1
        assert_sreg     0xa5a5a5a5, y1
        assert_sreg2    0xa5a5a5a5, a1
 
        pass
        exit 0

Line No.	Rev	Author	Line
1	26	jlechner	`# sh testcase for pand`
2			`# mach: shdsp`
3			`# as(shdsp): -defsym sim_cpu=1 -dsp`
4
5			`.include "testutils.inc"`
6
7			`start`
8			`set_grs_a5a5`
9			`lds r0, a0`
10			`pcopy a0, a1`
11			`lds r0, x0`
12			`lds r0, x1`
13			`lds r0, y0`
14			`lds r0, y1`
15			`pcopy x0, m0`
16			`pcopy y1, m1`
17
18			`pand x0, y0, a0`
19			`assert_sreg 0xa5a50000, a0`
20
21			`# 0xa5a5a5a5 & 0x5a5a5a5a == 0`
22			`set_greg 0x5a5a5a5a r0`
23			`lds r0, x0`
24			`pand x0, y0, a0`
25			`assert_sreg 0, a0`
26
27			`set_dcfalse`
28			`dct pand x0, y0, m0`
29			`assert_sreg2 0xa5a5a5a5, m0`
30			`set_dctrue`
31			`dct pand x0, y0, m0`
32			`assert_sreg2 0, m0`
33
34			`set_dctrue`
35			`dcf pand x0, y0, m1`
36			`assert_sreg2 0xa5a5a5a5, m1`
37			`set_dcfalse`
38			`dcf pand x0, y0, m1`
39			`assert_sreg2 0, m1`
40
41			`set_greg 0xa5a5a5a5, r0`
42			`test_grs_a5a5`
43			`assert_sreg 0xa5a5a5a5, x1`
44			`assert_sreg 0xa5a5a5a5, y1`
45			`assert_sreg2 0xa5a5a5a5, a1`
46
47			`pass`
48			`exit 0`

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [pand.s] - Blame information for rev 26