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rozpruwacz |
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\section{Introduction}
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\label{sec:introduction}
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This document descripes the multimedia card (MMC) / secure digital (SD) card controller ip core - \textit{Wishbone SD Card Controller IP Core}.
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\subsection{Purpose of the IP core}
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\label{sec:purpose}
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The \textit{Wishbone SD Card Controller IP Core} is MMC/SD communication controller designed to be used in System-on-Chip (img. \ref{img:ip_core}).
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IP core provides simple interface for any MCU with Wishbone bus. The communication between the MMC/SD card controller and MMC/SD card
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is performed according to the MMC/SD protocol.
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\begin{figure}[H]
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\centering
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\includegraphics[width=11cm]{../bin/ip_core.png}
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% ip_core.png: 384x469 pixel, 96dpi, 10.16x12.41 cm, bb=
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\caption{SoC with SD Card IP core}
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\label{img:ip_core}
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\end{figure}
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\subsection{Features}
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\label{sec:fetures}
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The MMC/SD card controller provides following features:
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\begin{itemize}
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\item 1- or 4-bit MMC/SD mode (does not support SPI mode),
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\item 32-bit Wishbone interface,
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\item DMA engine for data transfers,
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\item Interrupt generation on completion of data and command transactions,
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\item Configurable data transfer block size,
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\item Support for any command code (including multiple data block tranfser),
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\item Support for R1, R1b, R2(136-bit), R3, R6 and R7 responses.
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\end{itemize}
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