OpenCores
URL https://opencores.org/ocsvn/sd_card_controller/sd_card_controller/trunk

Subversion Repositories sd_card_controller

[/] [sd_card_controller/] [trunk/] [doc/] [src/] [introduction.tex] - Blame information for rev 8

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 8 rozpruwacz
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
2
%%%%                                                              %%%%
3
%%%% WISHBONE SD Card Controller IP Core                          %%%%
4
%%%%                                                              %%%%
5
%%%% introduction.tex                                             %%%%
6
%%%%                                                              %%%%
7
%%%% This file is part of the WISHBONE SD Card                    %%%%
8
%%%% Controller IP Core project                                   %%%%
9
%%%% http://opencores.org/project,sd_card_controller              %%%%
10
%%%%                                                              %%%%
11
%%%% Description                                                  %%%%
12
%%%% documentation 'Introduction' chapter                         %%%%
13
%%%%                                                              %%%%
14
%%%% Author(s):                                                   %%%%
15
%%%%     - Marek Czerski, ma.czerski@gmail.com                    %%%%
16
%%%%                                                              %%%%
17
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
18
%%%%                                                              %%%%
19
%%%% Copyright (C) 2013 Authors                                   %%%%
20
%%%%                                                              %%%%
21
%%%% This source file may be used and distributed without         %%%%
22
%%%% restriction provided that this copyright statement is not    %%%%
23
%%%% removed from the file and that any derivative work contains  %%%%
24
%%%% the original copyright notice and the associated disclaimer. %%%%
25
%%%%                                                              %%%%
26
%%%% This source file is free software; you can redistribute it   %%%%
27
%%%% and/or modify it under the terms of the GNU Lesser General   %%%%
28
%%%% Public License as published by the Free Software Foundation; %%%%
29
%%%% either version 2.1 of the License, or (at your option) any   %%%%
30
%%%% later version.                                               %%%%
31
%%%%                                                              %%%%
32
%%%% This source is distributed in the hope that it will be       %%%%
33
%%%% useful, but WITHOUT ANY WARRANTY; without even the implied   %%%%
34
%%%% warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      %%%%
35
%%%% PURPOSE. See the GNU Lesser General Public License for more  %%%%
36
%%%% details.                                                     %%%%
37
%%%%                                                              %%%%
38
%%%% You should have received a copy of the GNU Lesser General    %%%%
39
%%%% Public License along with this source; if not, download it   %%%%
40
%%%% from http://www.opencores.org/lgpl.shtml                     %%%%
41
%%%%                                                              %%%%
42
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
43 3 rozpruwacz
\section{Introduction}
44
\label{sec:introduction}
45
 
46
    This document descripes the multimedia card (MMC) / secure digital (SD) card controller ip core - \textit{Wishbone SD Card Controller IP Core}.
47
 
48
    \subsection{Purpose of the IP core}
49
    \label{sec:purpose}
50
 
51
    The \textit{Wishbone SD Card Controller IP Core} is MMC/SD communication controller designed to be used in System-on-Chip (img. \ref{img:ip_core}).
52
    IP core provides simple interface for any MCU with Wishbone bus. The communication between the MMC/SD card controller and MMC/SD card
53
    is performed according to the MMC/SD protocol.
54
 
55
    \begin{figure}[H]
56
        \centering
57
        \includegraphics[width=11cm]{../bin/ip_core.png}
58
        % ip_core.png: 384x469 pixel, 96dpi, 10.16x12.41 cm, bb=
59
        \caption{SoC with SD Card IP core}
60
        \label{img:ip_core}
61
    \end{figure}
62
 
63
    \subsection{Features}
64
    \label{sec:fetures}
65
    The MMC/SD card controller provides following features:
66
 
67
    \begin{itemize}
68
     \item 1- or 4-bit MMC/SD mode (does not support SPI mode),
69
     \item 32-bit Wishbone interface,
70
     \item DMA engine for data transfers,
71
     \item Interrupt generation on completion of data and command transactions,
72
     \item Configurable data transfer block size,
73
     \item Support for any command code (including multiple data block tranfser),
74
     \item Support for R1, R1b, R2(136-bit), R3, R6 and R7 responses.
75
    \end{itemize}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.