Subversion Repositories sdhc-sc-core

-- SDHC-SC-Core

-- Secure Digital High Capacity Self Configuring Core

-- 

-- (C) Copyright 2010, Rainer Kastl

-- All rights reserved.

-- 

-- Redistribution and use in source and binary forms, with or without

-- modification, are permitted provided that the following conditions are met:

--     * Redistributions of source code must retain the above copyright

--       notice, this list of conditions and the following disclaimer.

--     * Redistributions in binary form must reproduce the above copyright

--       notice, this list of conditions and the following disclaimer in the

--       documentation and/or other materials provided with the distribution.

--     * Neither the name of the <organization> nor the

--       names of its contributors may be used to endorse or promote products

--       derived from this software without specific prior written permission.

-- 

-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS  "AS IS" AND

-- ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

-- DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY

-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-- 

-- File        : WriteDataFifo-Syn-ea.vhdl

-- Owner       : Rainer Kastl

-- Description : 

-- Links       : 

-- 

-- megafunction wizard: %FIFO%

-- GENERATION: STANDARD

-- VERSION: WM1.0

-- MODULE: dcfifo 

-- ============================================================

-- File Name: WriteDataFifo.vhd

-- Megafunction Name(s):

--                      dcfifo

--

-- Simulation Library Files(s):

--                      altera_mf

-- ============================================================

-- ************************************************************

-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

--

-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition

-- ************************************************************

--Copyright (C) 1991-2010 Altera Corporation

--Your use of Altera Corporation's design tools, logic functions 

--and other software and tools, and its AMPP partner logic 

--functions, and any output files from any of the foregoing 

--(including device programming or simulation files), and any 

--associated documentation or information are expressly subject 

--to the terms and conditions of the Altera Program License 

--Subscription Agreement, Altera MegaCore Function License 

--Agreement, or other applicable license agreement, including, 

--without limitation, that your use is for the sole purpose of 

--programming logic devices manufactured by Altera and sold by 

--Altera or its authorized distributors.  Please refer to the 

--applicable agreement for further details.

LIBRARY ieee;

USE ieee.std_logic_1164.all;

LIBRARY altera_mf;

USE altera_mf.all;

ENTITY WriteDataFifo IS

        PORT

        (

                data            : IN STD_LOGIC_VECTOR (31 DOWNTO 0);

                rdclk           : IN STD_LOGIC ;

                rdreq           : IN STD_LOGIC ;

                wrclk           : IN STD_LOGIC ;

                wrreq           : IN STD_LOGIC ;

                q               : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);

                rdempty         : OUT STD_LOGIC ;

                wrfull          : OUT STD_LOGIC

        );

END WriteDataFifo;

ARCHITECTURE SYN OF writedatafifo IS

        SIGNAL sub_wire0        : STD_LOGIC ;

        SIGNAL sub_wire1        : STD_LOGIC ;

        SIGNAL sub_wire2        : STD_LOGIC_VECTOR (31 DOWNTO 0);

        COMPONENT dcfifo

        GENERIC (

                intended_device_family          : STRING;

                lpm_numwords            : NATURAL;

                lpm_showahead           : STRING;

                lpm_type                : STRING;

                lpm_width               : NATURAL;

                lpm_widthu              : NATURAL;

                overflow_checking               : STRING;

                rdsync_delaypipe                : NATURAL;

                underflow_checking              : STRING;

                use_eab         : STRING;

                wrsync_delaypipe                : NATURAL

        );

        PORT (

                        wrclk   : IN STD_LOGIC ;

                        rdempty : OUT STD_LOGIC ;

                        rdreq   : IN STD_LOGIC ;

                        wrfull  : OUT STD_LOGIC ;

                        rdclk   : IN STD_LOGIC ;

                        q       : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);

                        wrreq   : IN STD_LOGIC ;

                        data    : IN STD_LOGIC_VECTOR (31 DOWNTO 0)

        );

        END COMPONENT;

BEGIN

        rdempty    <= sub_wire0;

        wrfull    <= sub_wire1;

        q    <= sub_wire2(31 DOWNTO 0);

        dcfifo_component : dcfifo

        GENERIC MAP (

                intended_device_family => "Cyclone II",

                lpm_numwords => 512,

                lpm_showahead => "OFF",

                lpm_type => "dcfifo",

                lpm_width => 32,

                lpm_widthu => 9,

                overflow_checking => "ON",

                rdsync_delaypipe => 4,

                underflow_checking => "ON",

                use_eab => "ON",

                wrsync_delaypipe => 4

        )

        PORT MAP (

                wrclk => wrclk,

                rdreq => rdreq,

                rdclk => rdclk,

                wrreq => wrreq,

                data => data,

                rdempty => sub_wire0,

                wrfull => sub_wire1,

                q => sub_wire2

        );

END SYN;

-- ============================================================

-- CNX file retrieval info

-- ============================================================

-- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"

-- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"

-- Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

-- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

-- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

-- Retrieval info: PRIVATE: Clock NUMERIC "4"

-- Retrieval info: PRIVATE: Depth NUMERIC "512"

-- Retrieval info: PRIVATE: Empty NUMERIC "1"

-- Retrieval info: PRIVATE: Full NUMERIC "1"

-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"

-- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"

-- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"

-- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"

-- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"

-- Retrieval info: PRIVATE: Optimize NUMERIC "0"

-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"

-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"

-- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

-- Retrieval info: PRIVATE: UsedW NUMERIC "1"

-- Retrieval info: PRIVATE: Width NUMERIC "32"

-- Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

-- Retrieval info: PRIVATE: diff_widths NUMERIC "0"

-- Retrieval info: PRIVATE: msb_usedw NUMERIC "0"

-- Retrieval info: PRIVATE: output_width NUMERIC "32"

-- Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

-- Retrieval info: PRIVATE: rsFull NUMERIC "0"

-- Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

-- Retrieval info: PRIVATE: sc_aclr NUMERIC "0"

-- Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

-- Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

-- Retrieval info: PRIVATE: wsFull NUMERIC "1"

-- Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"

-- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "512"

-- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

-- Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"

-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32"

-- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "9"

-- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

-- Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "4"

-- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

-- Retrieval info: CONSTANT: USE_EAB STRING "ON"

-- Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "4"

-- Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL data[31..0]

-- Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL q[31..0]

-- Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk

-- Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty

-- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

-- Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk

-- Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull

-- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

-- Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0

-- Retrieval info: CONNECT: q 0 0 32 0 @q 0 0 32 0

-- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

-- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

-- Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0

-- Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0

-- Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0

-- Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0

-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo.vhd TRUE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo.inc FALSE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo.cmp FALSE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo.bsf FALSE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo_inst.vhd FALSE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo_waveforms.html TRUE

-- Retrieval info: GEN_FILE: TYPE_NORMAL WriteDataFifo_wave*.jpg FALSE

-- Retrieval info: LIB_FILE: altera_mf