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[/] [sgmii/] [trunk/] [sim/] [BFMs/] [SGMII_altera/] [sgmii_bb.v] - Blame information for rev 20

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1 20 jefflieu
// Generated by Triple Speed Ethernet 12.0 [Altera, IP Toolbench 1.3.0 Build 263.9]
2 9 jefflieu
// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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// ************************************************************
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// Copyright (C) 1991-2012 Altera Corporation
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// Any megafunction design, and related net list (encrypted or decrypted),
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// support information, device programming or simulation file, and any other
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// associated documentation or information provided by Altera or a partner
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// under Altera's Megafunction Partnership Program may be used only to
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// program PLD devices (but not masked PLD devices) from Altera.  Any other
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// use of such megafunction design, net list, support information, device
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// programming or simulation file, or any other related documentation or
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// information is prohibited for any other purpose, including, but not
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// limited to modification, reverse engineering, de-compiling, or use with
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// any other silicon devices, unless such use is explicitly licensed under
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// a separate agreement with Altera or a megafunction partner.  Title to
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// the intellectual property, including patents, copyrights, trademarks,
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// trade secrets, or maskworks, embodied in any such megafunction design,
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// net list, support information, device programming or simulation file, or
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// any other related documentation or information provided by Altera or a
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// megafunction partner, remains with Altera, the megafunction partner, or
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// their respective licensors.  No other licenses, including any licenses
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// needed under any third party's intellectual property, are provided herein.
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module sgmii (
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        gmii_rx_d,
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        gmii_rx_dv,
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        gmii_rx_err,
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        tx_clk,
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        rx_clk,
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        mii_rx_d,
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        mii_rx_dv,
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        mii_rx_err,
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        mii_col,
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        mii_crs,
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        set_10,
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        set_100,
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        set_1000,
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        hd_ena,
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        led_col,
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        led_crs,
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        led_an,
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        led_disp_err,
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        led_char_err,
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        led_link,
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        tx_clkena,
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        rx_clkena,
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        rx_recovclkout,
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        readdata,
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        waitrequest,
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        txp,
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        pcs_pwrdn_out,
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        reconfig_fromgxb,
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        gmii_tx_d,
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        gmii_tx_en,
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        gmii_tx_err,
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        mii_tx_d,
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        mii_tx_en,
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        mii_tx_err,
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        reset_tx_clk,
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        reset_rx_clk,
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        address,
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        read,
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        writedata,
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        write,
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        clk,
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        reset,
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        rxp,
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        ref_clk,
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        gxb_pwrdn_in,
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        gxb_cal_blk_clk,
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        reconfig_clk,
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        reconfig_togxb,
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        reconfig_busy);
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        output  [7:0]    gmii_rx_d;
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        output          gmii_rx_dv;
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        output          gmii_rx_err;
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        output          tx_clk;
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        output          rx_clk;
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        output  [3:0]    mii_rx_d;
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        output          mii_rx_dv;
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        output          mii_rx_err;
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        output          mii_col;
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        output          mii_crs;
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        output          set_10;
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        output          set_100;
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        output          set_1000;
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        output          hd_ena;
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        output          led_col;
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        output          led_crs;
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        output          led_an;
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        output          led_disp_err;
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        output          led_char_err;
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        output          led_link;
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        output          tx_clkena;
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        output          rx_clkena;
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        output          rx_recovclkout;
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        output  [15:0]   readdata;
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        output          waitrequest;
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        output          txp;
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        output          pcs_pwrdn_out;
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        output  [4:0]    reconfig_fromgxb;
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        input   [7:0]    gmii_tx_d;
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        input           gmii_tx_en;
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        input           gmii_tx_err;
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        input   [3:0]    mii_tx_d;
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        input           mii_tx_en;
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        input           mii_tx_err;
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        input           reset_tx_clk;
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        input           reset_rx_clk;
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        input   [4:0]    address;
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        input           read;
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        input   [15:0]   writedata;
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        input           write;
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        input           clk;
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        input           reset;
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        input           rxp;
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        input           ref_clk;
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        input           gxb_pwrdn_in;
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        input           gxb_cal_blk_clk;
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        input           reconfig_clk;
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        input   [3:0]    reconfig_togxb;
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        input           reconfig_busy;
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endmodule

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