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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [testbenches/] [xml/] [T6502_def_lint.xml] - Blame information for rev 133

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1 131 jt_eaton
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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opencores.org
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Mos6502
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T6502
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def_lint
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  elab_verilog
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  102.1
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  none
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  :*Simulation:*
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  ./tools/verilog/elab_verilog
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      configuration
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      default
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      dest_dir
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      io_ports
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  gen_design
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  102.1
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  none
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  :*Simulation:*
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  ./tools/verilog/gen_design
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      dest_dir
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      io_ports
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              Dut
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                                   spirit:library="Mos6502"
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                                   spirit:name="T6502"
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                                   spirit:version="def_dut.params"/>
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              lint
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              :*Lint:*
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              Verilog
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              fs-lint
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              rtl_check
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                                   spirit:library="Testbench"
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                                   spirit:name="toolflow"
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                                   spirit:version="rtl_check"/>
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      fs-lint
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        ../verilog/lint/T6502_def_lint
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        verilogSource
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        module
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