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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [sim/] [testbenches/] [xml/] [adv_dbg_if_jfifo_lint.xml] - Blame information for rev 131

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1 131 jt_eaton
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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opencores.org
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adv_debug_sys
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adv_dbg_if
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jfifo_lint
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              Dut
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                                   spirit:library="adv_debug_sys"
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                                   spirit:name="adv_dbg_if"
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                                   spirit:version="jfifo_dut.params"/>
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              lint
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              :*Lint:*
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              Verilog
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              fs-lint
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              rtl_check
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                                   spirit:library="Testbench"
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                                   spirit:name="toolflow"
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                                   spirit:version="rtl_check"/>
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      fs-lint
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        ../verilog/lint/adv_dbg_if_jfifo_lint
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        verilogSource
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        module
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