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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [componentCfg.xml] - Blame information for rev 133

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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
 
opencores.org
fpgas
Nexys2_T6502
 
 
2
_
_
_
VARIANT
 
 

 
/doc
 

 
 

 
            
              vga_font
              opencores.org
              fpgas
              vga_font
              code
            
 
 
 
            
              vga_startup_screen
              opencores.org
              fpgas
              vga_startup_screen
              code
            
 
 
          
            io_irq_2
            opencores.org
            Mos6502
            io_irq_2
            code
          
 
 
 
          
            io_poll_2
            opencores.org
            Mos6502
            io_poll_2
            code
          
 
 
          
            irq_2_test
            opencores.org
            Mos6502
            irq_2_test
            code
          
 
 
 
 
          
            kim_2
            opencores.org
            Mos6502
            kim_2
            code
          
 
 
 
          
            table_tim1
            opencores.org
            Mos6502
            table_tim1
            code
          
 
 
 
          
            tim_2
            opencores.org
            Mos6502
            tim_2
            code
          
 

 
 
 
 

 
 
       
         default
         
         RAM_WORDS2048
         RAM_ADD11
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_WORDS128
         PROG_ROM_ADD7
         VEC_TABLE8'hff
         CLOCK_FREQ50
         CLOCK_PLL_MULT2
         CLOCK_PLL_DIV4
         CLOCK_PLL_SIZE4
         CLOCK_SRC0
         RESET_SENSE0
         UART_PRESCALE5'b01100
         UART_PRE_SIZE5
         UART_DIV0
         JTAG_USER1_WIDTH8
         JTAG_USER1_RESET8'h12
        
       
 
 
 
 
       
         core
         
         RAM_WORDS0
         RAM_ADD0
         ROM_WORDS0
         ROM_ADD0
         PROG_ROM_WORDS0
         PROG_ROM_ADD0
         VEC_TABLE0'h00
         UART_PRESCALE0'b00000
         UART_PRE_SIZE0
         UART_DIV0
         JTAG_USER1_WIDTH0
         JTAG_USER1_RESET0'h00
        
       
 
 
 
 
 

 

 
Nexys2_T6502/sim
 
 
 
 

 
 
 

Nexys2_T6502_default_tb
default_tb

    PERIOD40
    TIMEOUT100000

 
   root.dut.core.T6502.cpucpu
 

  
  core_def  TB.test.dut.core.T6502.cpu.core
  
  
  io_module_def  TB.test.dut.core.T6502.io_module
  


  icarus
  coverage

 

 
 

Nexys2_T6502_default_lint
default_lint

  rtl_check

 

 
 
 
 

 
 
 
 

      
        default
        default
        Nexys2_T6502_default_lint
      

 
 
 
 
 
 
 

 
 
      
        io_irq_2
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE"NONE"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/io_irq_2/io_irq_2.abs16"
         PROG_ROM_WORDS128
         PROG_ROM_ADD7
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
           UART_MODEL_CLKCNT5'b11001
           UART_MODEL_SIZE5
           PERIOD20
        
      
 
 
      
        io_poll_2
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE"NONE"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/io_poll_2/io_poll_2.abs16"
         PROG_ROM_WORDS128
         PROG_ROM_ADD7
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
           UART_MODEL_CLKCNT5'b11001
           UART_MODEL_SIZE5
           PERIOD20
        
      
 
 
      
        irq_2_test
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE"NONE"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/irq_2_test/irq_2_test.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
           UART_MODEL_CLKCNT5'b11001
           UART_MODEL_SIZE5
           PERIOD20
        
      
 
      
        kim_2
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE
         "opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/kim_2/kim_2.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
           UART_MODEL_CLKCNT5'b11001
           UART_MODEL_SIZE5
           PERIOD20
           TIMEOUT800000
        
      
 
      
        jtag
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE
         "opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/kim_2/kim_2.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
           UART_MODEL_CLKCNT5'b11001
           UART_MODEL_SIZE5
           PERIOD20
           TIMEOUT800000
        
      
 
      
        tim_2
        default
        Nexys2_T6502_default_tb
        
         ROM_FILE
         "opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/tim_2/tim_2.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
         UART_DIV1
           UART_MODEL_CLKCNT9'h137
           UART_MODEL_SIZE9
           PERIOD20
           TIMEOUT8000000
        
      
 
 
 
 
 

 
 

 
 
 
 
 

 
 
Nexys2_T6502/syn
 
 
   
 
    
    kim_2
    Nexys2_T6502_kim_2
    default
        
         ROM_FILE
         "opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/kim_2/kim_2.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
        
    
    digilentinc.com
    Nexys2
    fpga
    xc3s1200e-fg320-5
    
    
 
 
    
    tim_2
    Nexys2_T6502_tim_2
    default
        
         ROM_FILE
         "opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"
         ROM_WORDS128
         ROM_ADD7
         PROG_ROM_FILE
         "opencores.org__Mos6502/sw/tim_2/tim_2.abs16"
         PROG_ROM_WORDS2048
         PROG_ROM_ADD11
         STARTUP
         "opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"
         FONT
         "opencores.org__fpgas/sw/vga_font/vga_font.abs"
         UART_DIV1
        
    
    digilentinc.com
    Nexys2
    fpga
    xc3s1200e-fg320-5
    
    
   
 
 
 
 
 
 

 

Nexys2_T6502_kim_2
kim_2
default



  ise


    digilentinc.com
    Nexys2
    fpga
    xc3s1200e-fg320-5


 
 
 

Nexys2_T6502_tim_2
tim_2
default



  ise


    digilentinc.com
    Nexys2
    fpga
    xc3s1200e-fg320-5


 
 
 
 
 
 

 
 
 
 
 
 
 
 

 
 
 
 
 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [componentCfg.xml] - Blame information for rev 133

Line No.	Rev	Author	Line
1	131	jt_eaton
2
5
6			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
7			`xmlns:socgen="http://opencores.org"`
8			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`
9
10			`opencores.org`
11			`fpgas`
12			`Nexys2_T6502`
13
14
15			`2`
16			`_`
17			`_`
18			`_`
19			`VARIANT`
20
21
22
23
24			`/doc`
25
26
27
28
29
30
31
32			`vga_font`
33			`opencores.org`
34			`fpgas`
35			`vga_font`
36			`code`
37
38
39
40
41
42			`vga_startup_screen`
43			`opencores.org`
44			`fpgas`
45			`vga_startup_screen`
46			`code`
47
48
49
50
51			`io_irq_2`
52			`opencores.org`
53			`Mos6502`
54			`io_irq_2`
55			`code`
56
57
58
59
60
61			`io_poll_2`
62			`opencores.org`
63			`Mos6502`
64			`io_poll_2`
65			`code`
66
67
68
69
70			`irq_2_test`
71			`opencores.org`
72			`Mos6502`
73			`irq_2_test`
74			`code`
75
76
77
78
79
80
81			`kim_2`
82			`opencores.org`
83			`Mos6502`
84			`kim_2`
85			`code`
86
87
88
89
90
91			`table_tim1`
92			`opencores.org`
93			`Mos6502`
94			`table_tim1`
95			`code`
96
97
98
99
100
101			`tim_2`
102			`opencores.org`
103			`Mos6502`
104			`tim_2`
105			`code`
106
107
108
109
110
111
112
113
114
115
116
117			`default`
118
119			`RAM_WORDS2048`
120			`RAM_ADD11`
121			`ROM_WORDS128`
122			`ROM_ADD7`
123			`PROG_ROM_WORDS128`
124			`PROG_ROM_ADD7`
125			`VEC_TABLE8'hff`
126			`CLOCK_FREQ50`
127			`CLOCK_PLL_MULT2`
128			`CLOCK_PLL_DIV4`
129			`CLOCK_PLL_SIZE4`
130			`CLOCK_SRC0`
131			`RESET_SENSE0`
132			`UART_PRESCALE5'b01100`
133			`UART_PRE_SIZE5`
134			`UART_DIV0`
135			`JTAG_USER1_WIDTH8`
136			`JTAG_USER1_RESET8'h12`
137
138
139
140
141	133	jt_eaton
142
143
144			`core`
145
146			`RAM_WORDS0`
147			`RAM_ADD0`
148			`ROM_WORDS0`
149			`ROM_ADD0`
150			`PROG_ROM_WORDS0`
151			`PROG_ROM_ADD0`
152			`VEC_TABLE0'h00`
153			`UART_PRESCALE0'b00000`
154			`UART_PRE_SIZE0`
155			`UART_DIV0`
156			`JTAG_USER1_WIDTH0`
157			`JTAG_USER1_RESET0'h00`
158
159
160
161
162
163
164
165	131	jt_eaton
166
167
168
169			`Nexys2_T6502/sim`
170
171
172
173
174
175
176
177
178
179			`Nexys2_T6502_default_tb`
180			`default_tb`
181
182			`PERIOD40`
183			`TIMEOUT100000`
184
185
186			`root.dut.core.T6502.cpucpu`
187
188
189
190			`core_def TB.test.dut.core.T6502.cpu.core`
191
192
193			`io_module_def TB.test.dut.core.T6502.io_module`
194
195
196
197			`icarus`
198			`coverage`
199
200
201
202
203
204
205			`Nexys2_T6502_default_lint`
206			`default_lint`
207
208			`rtl_check`
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223			`default`
224			`default`
225			`Nexys2_T6502_default_lint`
226
227
228
229
230
231
232
233
234
235
236
237
238
239			`io_irq_2`
240			`default`
241			`Nexys2_T6502_default_tb`
242
243			`ROM_FILE"NONE"`
244			`ROM_WORDS128`
245			`ROM_ADD7`
246			`PROG_ROM_FILE`
247			`"opencores.org__Mos6502/sw/io_irq_2/io_irq_2.abs16"`
248			`PROG_ROM_WORDS128`
249			`PROG_ROM_ADD7`
250			`STARTUP`
251			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
252			`FONT`
253			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
254			`UART_MODEL_CLKCNT5'b11001`
255			`UART_MODEL_SIZE5`
256			`PERIOD20`
257
258
259
260
261
262			`io_poll_2`
263			`default`
264			`Nexys2_T6502_default_tb`
265
266			`ROM_FILE"NONE"`
267			`ROM_WORDS128`
268			`ROM_ADD7`
269			`PROG_ROM_FILE`
270			`"opencores.org__Mos6502/sw/io_poll_2/io_poll_2.abs16"`
271			`PROG_ROM_WORDS128`
272			`PROG_ROM_ADD7`
273			`STARTUP`
274			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
275			`FONT`
276			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
277			`UART_MODEL_CLKCNT5'b11001`
278			`UART_MODEL_SIZE5`
279			`PERIOD20`
280
281
282
283
284
285			`irq_2_test`
286			`default`
287			`Nexys2_T6502_default_tb`
288
289			`ROM_FILE"NONE"`
290			`ROM_WORDS128`
291			`ROM_ADD7`
292			`PROG_ROM_FILE`
293			`"opencores.org__Mos6502/sw/irq_2_test/irq_2_test.abs16"`
294			`PROG_ROM_WORDS2048`
295			`PROG_ROM_ADD11`
296			`STARTUP`
297			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
298			`FONT`
299			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
300			`UART_MODEL_CLKCNT5'b11001`
301			`UART_MODEL_SIZE5`
302			`PERIOD20`
303
304
305
306
307			`kim_2`
308			`default`
309			`Nexys2_T6502_default_tb`
310
311			`ROM_FILE`
312			`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
313			`ROM_WORDS128`
314			`ROM_ADD7`
315			`PROG_ROM_FILE`
316			`"opencores.org__Mos6502/sw/kim_2/kim_2.abs16"`
317			`PROG_ROM_WORDS2048`
318			`PROG_ROM_ADD11`
319			`STARTUP`
320			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
321			`FONT`
322			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
323			`UART_MODEL_CLKCNT5'b11001`
324			`UART_MODEL_SIZE5`
325			`PERIOD20`
326			`TIMEOUT800000`
327
328
329
330
331	133	jt_eaton	`jtag`
332			`default`
333			`Nexys2_T6502_default_tb`
334
335			`ROM_FILE`
336			`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
337			`ROM_WORDS128`
338			`ROM_ADD7`
339			`PROG_ROM_FILE`
340			`"opencores.org__Mos6502/sw/kim_2/kim_2.abs16"`
341			`PROG_ROM_WORDS2048`
342			`PROG_ROM_ADD11`
343			`STARTUP`
344			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
345			`FONT`
346			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
347			`UART_MODEL_CLKCNT5'b11001`
348			`UART_MODEL_SIZE5`
349			`PERIOD20`
350			`TIMEOUT800000`
351
352
353
354
355	131	jt_eaton	`tim_2`
356			`default`
357			`Nexys2_T6502_default_tb`
358
359			`ROM_FILE`
360			`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
361			`ROM_WORDS128`
362			`ROM_ADD7`
363			`PROG_ROM_FILE`
364			`"opencores.org__Mos6502/sw/tim_2/tim_2.abs16"`
365			`PROG_ROM_WORDS2048`
366			`PROG_ROM_ADD11`
367			`STARTUP`
368			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
369			`FONT`
370			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
371			`UART_DIV1`
372			`UART_MODEL_CLKCNT9'h137`
373			`UART_MODEL_SIZE9`
374			`PERIOD20`
375			`TIMEOUT8000000`
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395			`Nexys2_T6502/syn`
396
397
398
399
400
401			`kim_2`
402			`Nexys2_T6502_kim_2`
403			`default`
404
405			`ROM_FILE`
406			`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
407			`ROM_WORDS128`
408			`ROM_ADD7`
409			`PROG_ROM_FILE`
410			`"opencores.org__Mos6502/sw/kim_2/kim_2.abs16"`
411			`PROG_ROM_WORDS2048`
412			`PROG_ROM_ADD11`
413			`STARTUP`
414			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
415			`FONT`
416			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
417
418
419			`digilentinc.com`
420			`Nexys2`
421			`fpga`
422			`xc3s1200e-fg320-5`
423
424
425
426
427
428			`tim_2`
429			`Nexys2_T6502_tim_2`
430			`default`
431
432			`ROM_FILE`
433			`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
434			`ROM_WORDS128`
435			`ROM_ADD7`
436			`PROG_ROM_FILE`
437			`"opencores.org__Mos6502/sw/tim_2/tim_2.abs16"`
438			`PROG_ROM_WORDS2048`
439			`PROG_ROM_ADD11`
440			`STARTUP`
441			`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
442			`FONT`
443			`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
444			`UART_DIV1`
445
446
447			`digilentinc.com`
448			`Nexys2`
449			`fpga`
450			`xc3s1200e-fg320-5`
451
452
453
454
455
456
457
458
459
460	133	jt_eaton
461	131	jt_eaton
462	133	jt_eaton
463			`Nexys2_T6502_kim_2`
464			`kim_2`
465			`default`
466
467
468
469			`ise`
470
471
472			`digilentinc.com`
473			`Nexys2`
474			`fpga`
475			`xc3s1200e-fg320-5`
476
477
478
479
480
481
482			`Nexys2_T6502_tim_2`
483			`tim_2`
484			`default`
485
486
487
488			`ise`
489
490
491			`digilentinc.com`
492			`Nexys2`
493			`fpga`
494			`xc3s1200e-fg320-5`
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512	131	jt_eaton
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537