URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [sim/] [testbenches/] [verilog/] [tb.ver] - Blame information for rev 131

Details | Compare with Previous | View Log


assign      enable             = 1'b1;
assign      cs                 = 1'b0;
assign      ps2_clk_pad_in     = 1'b1;
assign      ps2_data_pad_in    = 1'b1;
assign      rd                 = 1'b0;
assign      wr                 = 1'b1;
assign      addr               =  'b0;
assign      wdata              =  'b0;
 
 
assign STOP = 1'b0;
assign BAD = 1'b0;
 
 
 

Line No.	Rev	Author	Line
1	131	jt_eaton	`assign enable = 1'b1;`
2			`assign cs = 1'b0;`
3			`assign ps2_clk_pad_in = 1'b1;`
4			`assign ps2_data_pad_in = 1'b1;`
5			`assign rd = 1'b0;`
6			`assign wr = 1'b1;`
7			`assign addr = 'b0;`
8			`assign wdata = 'b0;`
9
10
11			`assign STOP = 1'b0;`
12			`assign BAD = 1'b0;`
13
14
15

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [sim/] [testbenches/] [verilog/] [tb.ver] - Blame information for rev 131