URL https://opencores.org/ocsvn/socgen/socgen/trunk

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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Busdefs/] [enable/] [xml/] [enable_def_rtl.abstractionDefinition.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
Busdefs
enable
rtl
 

  
    
      enable
      
        
          1
          out
        
        
          1
          in
        
      
    
  

 
 
 
 
 
 
 
 
 

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31	135	jt_eaton
32			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
33	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
34			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
35	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
36			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
37	131	jt_eaton
38	135	jt_eaton	`opencores.org`
39			`Busdefs`
40			`enable`
41			`rtl`
42	131	jt_eaton
43	135	jt_eaton
44
45
46			`enable`
47
48
49			`1`
50			`out`
51
52
53			`1`
54			`in`
55
56
57
58
59
60	131	jt_eaton
61
62
63
64
65
66
67
68

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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Busdefs/] [enable/] [xml/] [enable_def_rtl.abstractionDefinition.xml] - Blame information for rev 135