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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [toolflows/] [toolflow/] [xml/] [verilog.xml] - Blame information for rev 131

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1 131 jt_eaton
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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opencores.org
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Testbench
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toolflow
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verilog
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  gen_verilogLib_sim
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  105.0
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  none
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  :*Simulation:*
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  ./tools/verilog/gen_verilogLib
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      dest_dir
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      ../views
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      view
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      sim
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  gen_verilogLib_syn
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  105.0
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  none
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  :*Synthesis:*
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  ./tools/verilog/gen_verilogLib
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      dest_dir
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      ../views
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      view
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      syn
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      fs-sim
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        dest_dir
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        ../views/sim/
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        verilogSource
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        libraryDir
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      fs-syn
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        dest_dir
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        ../views/syn/
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        verilogSource
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        libraryDir
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      fs-lint
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        dest_dir
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        ../views/syn/
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        verilogSource
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        libraryDir
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              sim
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              :*Simulation:*
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              Verilog
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              fs-sim
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              syn
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              :*Synthesis:*
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              Verilog
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              fs-syn
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              lint
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              :*Lint:*
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              Verilog
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              fs-lint
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