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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [jtag/] [rtl/] [verilog/] [tap_logic] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton
//********************************************************************
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//*** assignments for 2nd channel
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//********************************************************************
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 assign      aux_jtag_clk               = jtag_clk;
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 assign      aux_update_dr_clk_o        = update_dr_clk_o;
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 assign      aux_shiftcapture_dr_clk_o  = shiftcapture_dr_clk_o;
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 assign      aux_test_logic_reset_o     = test_logic_reset_o;
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 assign      aux_tdi_o                  = tdi_o;
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 assign      aux_capture_dr_o           = capture_dr_o;
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 assign      aux_shift_dr_o             = shift_dr_o;
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 assign      aux_update_dr_o            = update_dr_o;
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 assign      chip_id_value              = CHIP_ID_VAL ;
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 assign      shiftcapture_dr_o          =  shift_dr_o || capture_dr_o;
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 assign      tdi_o                      =  tdi_pad_in;
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// Instruction Decoder
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 assign      extest          = ( instruction == EXTEST );
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 assign      sample          = ( instruction == SAMPLE );
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 assign      clamp           = ( instruction == CLAMP );
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 assign      chip_id_select  = ( instruction == CHIP_ID_ACCESS );
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// bypass anytime we are not doing a defined instructions, or if in clamp or bypass mode
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 assign      shiftcapture_dr_clk_o     =  jtag_shift_clk;
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 assign      select_o                  = ( instruction == RPC_ADD );
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 assign      aux_select_o              = ( instruction == RPC_DATA );
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 assign      bsr_select_o              = ( instruction == EXTEST ) || ( instruction == SAMPLE )       ;
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//****************************************************************
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//*** Choose what goes out on the TDO pin
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//****************************************************************
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always@(*)
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  begin
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     if(chip_id_select)       next_tdo =  chip_id_tdo;
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     else
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     if(select_o)             next_tdo =  tdo_i;
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     else
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     if(aux_select_o)         next_tdo =  aux_tdo_i;
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     else                     next_tdo =  1'b0;
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  end

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