OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [icarus/] [both/] [test_define] - Blame information for rev 131

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 131 jt_eaton
 
2
 
3
initial
4
begin
5
$display("              ");
6
$display("              ===================================================");
7
$display("              Test Start");
8
$display("              ===================================================");
9
$display("              ");
10
test.cg.next(20);
11
 
12
fork
13
begin
14
test.xmit_parity_enable    <= 1'b1;             // 0 = no parity bit sent, 1= parity bit sent
15
test.xmit_parity_type      <= 1'b1;              // 0= odd,1=even
16
test.xmit_parity_force     <= 1'b1;              // force parity_type
17
test.xmit_load             <= 1'b0;              // start transmiting data
18
test.xmit_start_value      <= 1'b0;            // value out at start bit time
19
test.xmit_stop_value       <= 1'b1;            // value out for stop bit also used for break
20
test.xmit_data             <= 8'h34;
21
test.cg.next(5);
22
test.xmit_load             <= 1'b1;              // start transmiting data
23
test.cg.next(1);
24
test.xmit_load             <= 1'b0;              // start transmiting data
25
test.cg.next(400);
26
test.xmit_data             <= 8'hf1;
27
test.cg.next(5);
28
test.xmit_load             <= 1'b1;              // start transmiting data
29
test.cg.next(1);
30
test.xmit_load             <= 1'b0;              // start transmiting data
31
test.cg.next(400);
32
 
33
 
34
test.cg.exit;
35
end
36
begin
37
while (1)
38
 begin
39
 test.xmit_edge_enable <= 0;
40
 test.cg.next(15);
41
 test.xmit_edge_enable <= 1;
42
 test.cg.next(1);
43
 end
44
end
45
 
46
join
47
end
48
 
49
 
50
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.