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URL https://opencores.org/ocsvn/sockit_owm/sockit_owm/trunk

Subversion Repositories sockit_owm

[/] [sockit_owm/] [trunk/] [demo/] [Terasic_DE1/] [soc.sopc] - Blame information for rev 3

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Line No. Rev Author Line
1 3 iztok
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{
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   element jtag_uart.avalon_jtag_slave
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206784";
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         type = "long";
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      }
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   }
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   element cfi_flash
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   {
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      datum _sortIndex
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      {
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         value = "4";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element clk
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   {
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      datum _sortIndex
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      {
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         value = "11";
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         type = "int";
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      }
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   }
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   element sysid.control_slave
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206912";
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         type = "long";
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      }
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   }
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   element cpu
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   {
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      datum _sortIndex
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      {
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         value = "0";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "1";
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         type = "boolean";
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      }
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   }
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   element epcs_flash.epcs_control_port
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25204736";
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         type = "long";
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      }
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   }
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   element epcs_flash
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   {
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      datum _sortIndex
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      {
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         value = "1";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element cpu.jtag_debug_module
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25202688";
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         type = "long";
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      }
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   }
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   element jtag_uart
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   {
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      datum _sortIndex
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      {
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         value = "6";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element onchip_ram
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   {
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      datum _sortIndex
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      {
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         value = "2";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element onewire
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   {
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      datum _sortIndex
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      {
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         value = "12";
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         type = "int";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element pio_7seg
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   {
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      datum _sortIndex
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      {
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         value = "8";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element pio_ledg
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   {
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      datum _sortIndex
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      {
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         value = "9";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element pio_ledr
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   {
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      datum _sortIndex
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      {
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         value = "10";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element sdram.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "8388608";
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         type = "long";
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      }
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   }
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   element timer.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206944";
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         type = "long";
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      }
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   }
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   element pio_7seg.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206848";
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         type = "long";
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      }
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   }
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   element onchip_ram.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25182208";
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         type = "long";
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      }
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   }
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   element pio_ledg.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206864";
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         type = "long";
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      }
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   }
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   element onewire.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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   }
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   element uart.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206816";
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         type = "long";
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      }
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   }
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   element cfi_flash.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "20971520";
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         type = "long";
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      }
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   }
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   element pio_ledr.s1
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   {
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      datum _lockedAddress
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      {
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         value = "1";
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         type = "boolean";
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      }
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      datum baseAddress
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      {
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         value = "25206880";
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         type = "long";
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      }
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   }
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   element sdram
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   {
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      datum _sortIndex
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      {
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         value = "5";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element soc
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   {
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   }
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   element sysid
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   {
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      datum _sortIndex
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      {
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         value = "13";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element timer
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   {
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      datum _sortIndex
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      {
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         value = "14";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element tri_state_bridge_flash
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   {
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      datum _sortIndex
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      {
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         value = "3";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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   element uart
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   {
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      datum _sortIndex
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      {
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         value = "7";
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         type = "int";
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      }
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      datum megawizard_uipreferences
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      {
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         value = "{}";
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         type = "String";
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      }
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      datum sopceditor_expanded
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      {
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         value = "0";
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         type = "boolean";
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      }
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   }
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}
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]]>
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  ]]>
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  M512_MEMORY 0 M4K_MEMORY 1 M9K_MEMORY 0 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 0 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0
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  ]]>
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  cpu.jtag_debug_module
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528
 
529
   kind="altera_avalon_jtag_uart"
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   version="10.0"
531
   enabled="1"
532
   name="jtag_uart">
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  INTERACTIVE_ASCII_OUTPUT
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   kind="altera_avalon_onchip_memory2"
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   version="10.0"
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   enabled="1"
565
   name="onchip_ram">
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583
 
584
   kind="altera_avalon_new_sdram_controller"
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   version="10.0"
586
   enabled="1"
587
   name="sdram">
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654
   kind="altera_avalon_epcs_flash_controller"
655
   version="10.0"
656
   enabled="1"
657
   name="epcs_flash">
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660
  
661
 
662
 
663
   kind="altera_avalon_cfi_flash"
664
   version="10.0"
665
   enabled="1"
666
   name="cfi_flash">
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669
  
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   kind="altera_avalon_tri_state_bridge"
679
   version="10.0"
680
   enabled="1"
681
   name="tri_state_bridge_flash">
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   kind="avalon"
710
   version="6.1"
711
   start="cpu.instruction_master"
712
   end="cpu.jtag_debug_module">
713
  
714
  
715
 
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   kind="avalon"
718
   version="6.1"
719
   start="cpu.data_master"
720
   end="cpu.jtag_debug_module">
721
  
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723
 
724
 
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   kind="avalon"
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   version="6.1"
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   start="cpu.data_master"
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   end="jtag_uart.avalon_jtag_slave">
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   kind="avalon"
747
   version="6.1"
748
   start="cpu.instruction_master"
749
   end="onchip_ram.s1">
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   kind="avalon"
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   version="6.1"
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   start="cpu.data_master"
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   end="onchip_ram.s1">
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   kind="avalon"
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   version="6.1"
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   start="cpu.instruction_master"
766
   end="sdram.s1">
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   kind="avalon"
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   version="6.1"
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   start="cpu.instruction_master"
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   end="epcs_flash.epcs_control_port">
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   kind="avalon"
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   version="6.1"
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   start="cpu.data_master"
802
   end="epcs_flash.epcs_control_port">
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   kind="interrupt"
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   version="10.0"
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   start="cpu.d_irq"
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   end="epcs_flash.irq">
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   kind="clock"
816
   version="10.0"
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   start="clk.clk"
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   end="tri_state_bridge_flash.clk" />
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   kind="avalon"
821
   version="6.1"
822
   start="cpu.instruction_master"
823
   end="tri_state_bridge_flash.avalon_slave">
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   kind="avalon"
829
   version="6.1"
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   start="cpu.data_master"
831
   end="tri_state_bridge_flash.avalon_slave">
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   kind="avalon_tristate"
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   version="10.0"
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   start="tri_state_bridge_flash.tristate_master"
839
   end="cfi_flash.s1">
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   kind="avalon"
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   version="6.1"
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   start="cpu.data_master"
848
   end="sysid.control_slave">
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