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Subversion Repositories spimaster

[/] [spimaster/] [trunk/] [sim/] [compile.do] - Blame information for rev 4

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Line No. Rev Author Line
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_dpMem_dc.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_fifoRTL.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_RxFifoBI.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_TxFifoBI.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_RxFifo.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sm_TxFifo.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/initSD.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/readWriteSPIWireData.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/readWriteSDBlock.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/sendCmd.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/spiCtrl.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/spiTxRxData.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/spiMaster.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../model/wb_master_model.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/spiMasterWishBoneBI.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../rtl/ctrlStsRegBI.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../model/sdModel.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../bench/testHarness.v
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vlog +define+SIM_COMPILE +incdir+../rtl ../bench/testCase0.v
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