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[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [rtl/] [port_ring_tap_fsm.v] - Blame information for rev 13

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1 5 ghutchis 
module port_ring_tap_fsm
2 
  #(parameter rdp_sz = 64,
3 8 ghutchis 
    parameter pdp_sz = 64,
4 5 ghutchis 
    parameter portnum = 0)
5 
  (
6 
   input               clk,
7 
   input               reset,
8 
 
9 
   output reg               lfli_drdy,
10 
   output reg               lprx_drdy,
11 8 ghutchis 
   output reg[pdp_sz-1:0]    lptx_data,
12 5 ghutchis 
   output reg               lptx_srdy,
13 
   output reg               lri_drdy,
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   output reg[rdp_sz-1:0]    lro_data,
15 
   output reg               lro_srdy,
16 
 
17 8 ghutchis 
   input [`NUM_PORTS-1:0]   lfli_data,
18 5 ghutchis 
   input               lfli_srdy,
19 8 ghutchis 
   input [pdp_sz-1:0]   lprx_data,
20 5 ghutchis 
   input               lprx_srdy,
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   input               lptx_drdy,
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   input [rdp_sz-1:0]   lri_data,
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   input               lri_srdy,
24 12 ghutchis 
   input               lro_drdy,
25 
 
26 
   output              rarb_req,
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   input               rarb_ack
28 5 ghutchis 
   );
29 
 
30 8 ghutchis 
  reg [4:0]            state, nxt_state;
31 5 ghutchis 
 
32 
  wire [`NUM_PORTS-1:0] port_mask;
33 11 ghutchis 
  //reg [`NUM_PORTS-1:0]  pe_vec, nxt_pe_vec;
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  wire [`NUM_PORTS-1:0] nxt_pe_vec = lri_data[`PRW_DATA] & ~port_mask;
35 5 ghutchis 
 
36 
  assign port_mask = 1 << portnum;
37 
 
38 8 ghutchis 
  localparam s_idle = 0,
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             s_rfwd = 1,
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             s_rcopy = 2,
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             s_rsink = 3,
42 13 ghutchis 
             s_tdata = 4,
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              s_tdrop = 5;
44 8 ghutchis 
  localparam ns_idle = 1,
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             ns_rfwd = 2,
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             ns_rcopy = 4,
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             ns_rsink = 8,
48 13 ghutchis 
             ns_tdata = 16,
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    ns_tdrop = 32;
50 12 ghutchis 
 
51 
  assign rarb_req = lfli_srdy & lprx_srdy | state[s_tdata];
52 5 ghutchis 
 
53 
  always @*
54 
    begin
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      lro_data = lri_data;
56 8 ghutchis 
      lptx_data = lri_data;
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      lfli_drdy = 0;
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      lprx_drdy = 0;
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      lptx_srdy = 0;
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      lri_drdy  = 0;
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      lro_srdy  = 0;
62 12 ghutchis 
      nxt_state = state;
63 5 ghutchis 
 
64 
      case (1'b1)
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        state[s_idle] :
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          begin
67 12 ghutchis 
            if (lfli_srdy & lprx_srdy & rarb_ack)
68 5 ghutchis 
              begin
69 8 ghutchis 
                if (lfli_data != 0)
70 
                  begin
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                    lro_data = 0;
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                    lro_data[`PRW_PVEC] = 1;
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                    lro_data[`PRW_DATA] = lfli_data;
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                    if (lro_drdy)
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                      begin
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                        lfli_drdy = 1;
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                        lro_srdy = 1;
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                        nxt_state = ns_tdata;
79 
                      end
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                  end
81 
                else
82 13 ghutchis 
                  begin
83 
                    lfli_drdy = 1;
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                    nxt_state = ns_tdrop;
85 
                  end
86 5 ghutchis 
              end
87 
            else if (lri_srdy)
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              begin
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                if (lri_data[`PRW_DATA] & port_mask)
90 
                  begin
91 
                    // packet is for our port
92 11 ghutchis 
                    //nxt_pe_vec = lri_data[`PRW_DATA] & ~port_mask;
93 5 ghutchis 
 
94 
                    // if enable vector is not empty, send the
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                    // vector to the next port
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                    if ((nxt_pe_vec != 0) & lro_drdy)
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                      begin
98 
                        lro_data[`PRW_DATA] = nxt_pe_vec;
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                        lro_data[`PRW_PVEC] = 1;
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                        lro_srdy = 1;
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                        lri_drdy = 1;
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                        nxt_state = ns_rcopy;
103 
                      end
104 11 ghutchis 
                    else if (nxt_pe_vec == 0)
105 5 ghutchis 
                      begin
106 
                        lri_drdy = 1;
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                        nxt_state = ns_rsink;
108 
                      end // else: !if((nxt_pe_vec != 0) & lro_drdy)
109 
                  end // if (lri_data[`PRW_DATA] & port_mask)
110 
                else
111 
                  // packet is not for our port, forward it on the
112 
                  // ring
113 
                  begin
114 
                    if (lro_drdy)
115 
                      begin
116 
                        lri_drdy = 1;
117 
                        lro_srdy = 1;
118 
                        nxt_state = ns_rfwd;
119 
                      end
120 
                  end // else: !if(lri_data[`PRW_DATA] & port_mask)
121 
              end // if (lri_srdy)
122 
          end // case: state[s_idle]
123 
 
124 8 ghutchis 
        // transmit data from port on to the ring
125 
        state[s_tdata] :
126 
          begin
127 
            lro_data = lprx_data;
128 
            lro_data[`PRW_PVEC] = 0;
129 
            if (lro_drdy & lprx_srdy)
130 
              begin
131 
                lprx_drdy = 1;
132 
                lro_srdy  = 1;
133 
                if ((lprx_data[`PRW_PCC] == `PCC_EOP) |
134 
                    (lprx_data[`PRW_PCC] == `PCC_BADEOP))
135 
                  nxt_state = ns_idle;
136 
              end
137 
          end // case: state[s_tdata]
138 
 
139 13 ghutchis 
        // received lookup from FIB with zero port index; drop
140 
        // the packet by reading out
141 
        state[s_tdrop] :
142 
          begin
143 
            lprx_drdy = 1;
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            if (lprx_srdy)
145 
              begin
146 
                if ((lprx_data[`PRW_PCC] == `PCC_EOP) |
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                    (lprx_data[`PRW_PCC] == `PCC_BADEOP))
148 
                  nxt_state = ns_idle;
149 
              end
150 
          end
151 
 
152 8 ghutchis 
        // data on ring is for our port as well as further ports
153 
        // copy ring data to our TX buffer as well as on the ring
154 
        state[s_rcopy] :
155 
          begin
156 
            lro_data = lri_data;
157 
            lptx_data = lri_data[`PFW_SZ-1:0];
158 
            if (lri_srdy & lro_drdy & lptx_drdy)
159 
              begin
160 
                lri_drdy = 1;
161 
                lro_srdy = 1;
162 
                lptx_srdy = 1;
163 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
164 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
165 
                  nxt_state = ns_idle;
166 
              end
167 
          end
168 
 
169 
        // data on ring is not for our port, copy from ring in to ring out
170 
        state[s_rfwd] :
171 
          begin
172 
            lro_data = lri_data;
173 
            if (lri_srdy & lro_drdy)
174 
              begin
175 
                lri_drdy = 1;
176 
                lro_srdy = 1;
177 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
178 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
179 
                  nxt_state = ns_idle;
180 
              end
181 
          end
182 
 
183 
        // data on ring is for our port and we are the last port
184 
        // copy ring data to our TX buffer but do not copy to ring
185 11 ghutchis 
        state[s_rsink] :
186 8 ghutchis 
          begin
187 
            lptx_data = lri_data[`PFW_SZ-1:0];
188 
            if (lri_srdy & lptx_drdy)
189 
              begin
190 
                lri_drdy = 1;
191 
                lptx_srdy = 1;
192 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
193 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
194 
                  nxt_state = ns_idle;
195 
              end
196 
          end
197 
 
198 5 ghutchis 
        default : nxt_state = ns_idle;
199 
      endcase // case (1'b1)
200 
    end // always @ *
201 8 ghutchis 
 
202 
  always @(posedge clk)
203 
    begin
204 
      if (reset)
205 
        begin
206 
          state <= #1 1;
207 
          /*AUTORESET*/
208 
        end
209 
      else
210 
        begin
211 
          state <= #1 nxt_state;
212 
        end
213 
    end // always @ (posedge clk)
214 
 
215 5 ghutchis 
 
216 
 
217 
endmodule // port_ring_tap_fsm

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