OpenCores
URL https://opencores.org/ocsvn/uart2spi/uart2spi/trunk

Subversion Repositories uart2spi

[/] [uart2spi/] [trunk/] [verif/] [run/] [file.f] - Blame information for rev 3

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 dinesha
+define+SFLASH_SPDUP
2
+incdir+../models/st_m25p16
3
+incdir+../tb
4
./time_scale.v
5
../rtl/top/top.v
6
../rtl/uart_core/uart_core.v
7
../rtl/uart_core/clk_ctl.v
8
../rtl/uart_core/uart_rxfsm.v
9
../rtl/uart_core/uart_txfsm.v
10
../rtl/msg_hand/uart_msg_handler.v
11
../rtl/spi/spi_core.v
12
../rtl/spi/spi_ctl.v
13
../rtl/spi/spi_if.v
14
../rtl/spi/spi_cfg.v
15
../rtl/lib/registers.v
16
../tb/tb_top.v
17
../models/st_m25p16/acdc_check.v
18
../models/st_m25p16/internal_logic.v
19
../models/st_m25p16/memory_access.v
20
../models/st_m25p16/M25p16.v
21
../tb/uart_agent.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.