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URL https://opencores.org/ocsvn/uart2spi/uart2spi/trunk

Subversion Repositories uart2spi

[/] [uart2spi/] [trunk/] [verif/] [tb/] [spi_test.v] - Blame information for rev 3

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Line No. Rev Author Line
1 3 dinesha
/*****************************************************
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  Verify the Read/Write in ST Flash
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*****************************************************/
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task spi_test;
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begin
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 $display("############################################");
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 $display("   Testing ST Flash Read/Write Access       ");
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 $display("############################################");
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  tb_top.spi_init(); // SPI Tb Init
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  tb_top.spi_chip_no = 2'b00; // Select the Chip Select to zero
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  // Write Enable command
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  tb_top.spi_write_byte(8'h6); // Write Enable instruction
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  tb_top.spi_sector_errase(24'h00);
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  tb_top.spi_wait_busy;
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  // Page Write
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  tb_top.spi_write_byte(8'h6); // Write Enable instruction
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  tb_top.spi_page_write(24'h00);
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  tb_top.spi_wait_busy;
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  // Page Read
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  tb_top.spi_page_read_verify(24'h00); // Read and verify 256 Bytes
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  tb_top.spi_tb_status; // SPI Tb Init
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end
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endtask

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