| 1 |
40 |
leonardoar |
\section{Behavioral Architecture Reference}
|
| 2 |
|
|
\label{classuart__wishbone__slave_1_1_behavioral}\index{Behavioral@{Behavioral}}
|
| 3 |
|
|
|
| 4 |
|
|
|
| 5 |
|
|
Top \doxyref{uart\-\_\-wishbone\-\_\-slave}{p.}{classuart__wishbone__slave} architecture.
|
| 6 |
|
|
|
| 7 |
|
|
|
| 8 |
|
|
\\*
|
| 9 |
|
|
\\*
|
| 10 |
|
|
\subsection*{Components}
|
| 11 |
|
|
\begin{DoxyCompactItemize}
|
| 12 |
|
|
\item
|
| 13 |
|
|
{\bf uart\-\_\-control} {\bfseries }
|
| 14 |
|
|
\begin{DoxyCompactList}\small\item\em Global reset. \end{DoxyCompactList}\item
|
| 15 |
|
|
{\bf uart\-\_\-communication\-\_\-blocks} {\bfseries }
|
| 16 |
|
|
\begin{DoxyCompactList}\small\item\em Global reset. \end{DoxyCompactList}\end{DoxyCompactItemize}
|
| 17 |
|
|
\subsection*{Signals}
|
| 18 |
|
|
\begin{DoxyCompactItemize}
|
| 19 |
|
|
\item
|
| 20 |
|
|
{\bf baud\-\_\-wait} {\bfseries std\-\_\-logic\-\_\-vector ( ( n\-Bits\-Large -\/ 1 ) downto 0 ) } \label{classuart__wishbone__slave_1_1_behavioral_a02e6fc94d95d5dd4100e3116031c017d}
|
| 21 |
|
|
|
| 22 |
|
|
\item
|
| 23 |
|
|
{\bf tx\-\_\-data\-\_\-sent} {\bfseries std\-\_\-logic } \label{classuart__wishbone__slave_1_1_behavioral_a5e38b2036bfceaed6dd35ffe5106eb68}
|
| 24 |
|
|
|
| 25 |
|
|
\item
|
| 26 |
|
|
{\bf tx\-\_\-start} {\bfseries std\-\_\-logic } \label{classuart__wishbone__slave_1_1_behavioral_a55e879368f17fd77652395947f70a9fb}
|
| 27 |
|
|
|
| 28 |
|
|
\item
|
| 29 |
|
|
{\bf rst\-\_\-comm\-\_\-blocks} {\bfseries std\-\_\-logic } \label{classuart__wishbone__slave_1_1_behavioral_ac46b40649bbe9f0e9aa3b226b3d26bb6}
|
| 30 |
|
|
|
| 31 |
|
|
\item
|
| 32 |
|
|
{\bf rx\-\_\-data\-\_\-ready} {\bfseries std\-\_\-logic } \label{classuart__wishbone__slave_1_1_behavioral_a3c51937788e20277886cbe0d74d31e3c}
|
| 33 |
|
|
|
| 34 |
|
|
\item
|
| 35 |
|
|
{\bf data\-\_\-byte\-\_\-tx} {\bfseries std\-\_\-logic\-\_\-vector ( 7 downto 0 ) } \label{classuart__wishbone__slave_1_1_behavioral_aadcbdfcb50dfbf081d01dde343bfd15b}
|
| 36 |
|
|
|
| 37 |
|
|
\item
|
| 38 |
|
|
{\bf data\-\_\-byte\-\_\-rx} {\bfseries std\-\_\-logic\-\_\-vector ( 7 downto 0 ) } \label{classuart__wishbone__slave_1_1_behavioral_a7789228178d32293559434619171f1d6}
|
| 39 |
|
|
|
| 40 |
|
|
\end{DoxyCompactItemize}
|
| 41 |
|
|
|
| 42 |
|
|
|
| 43 |
|
|
\subsection{Detailed Description}
|
| 44 |
|
|
Top \doxyref{uart\-\_\-wishbone\-\_\-slave}{p.}{classuart__wishbone__slave} architecture.
|
| 45 |
|
|
|
| 46 |
|
|
Connect the control unit and the communication blocks
|
| 47 |
|
|
|
| 48 |
|
|
Definition at line 29 of file uart\-\_\-wishbone\-\_\-slave.\-vhd.
|
| 49 |
|
|
|
| 50 |
|
|
|
| 51 |
|
|
|
| 52 |
|
|
\subsection{Member Data Documentation}
|
| 53 |
|
|
\index{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral@{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral}!uart\-\_\-control@{uart\-\_\-control}}
|
| 54 |
|
|
\index{uart\-\_\-control@{uart\-\_\-control}!uart_wishbone_slave::Behavioral@{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral}}
|
| 55 |
|
|
\subsubsection[{uart\-\_\-control}]{\setlength{\rightskip}{0pt plus 5cm}{\bf uart\-\_\-control} {\bfseries } \hspace{0.3cm}{\ttfamily [Component]}}\label{classuart__wishbone__slave_1_1_behavioral_af10b00731d230bdd4222dc8e41e55ef0}
|
| 56 |
|
|
|
| 57 |
|
|
|
| 58 |
|
|
Global reset.
|
| 59 |
|
|
|
| 60 |
|
|
Global clock Write enable Register address Start (Strobe) Done (A\-C\-K) Data Input (Wishbone) Data output (Wishbone) Signal to control the baud rate frequency 1 Byte to be send to \doxyref{serial\-\_\-transmitter}{p.}{classserial__transmitter} 1 Byte to be received by \doxyref{serial\-\_\-receiver}{p.}{classserial__receiver} Signal comming from \doxyref{serial\-\_\-transmitter}{p.}{classserial__transmitter} Signal to start sending serial data... Reset Communication blocks
|
| 61 |
|
|
|
| 62 |
|
|
Definition at line 30 of file uart\-\_\-wishbone\-\_\-slave.\-vhd.
|
| 63 |
|
|
|
| 64 |
|
|
\index{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral@{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral}!uart\-\_\-communication\-\_\-blocks@{uart\-\_\-communication\-\_\-blocks}}
|
| 65 |
|
|
\index{uart\-\_\-communication\-\_\-blocks@{uart\-\_\-communication\-\_\-blocks}!uart_wishbone_slave::Behavioral@{uart\-\_\-wishbone\-\_\-slave\-::\-Behavioral}}
|
| 66 |
|
|
\subsubsection[{uart\-\_\-communication\-\_\-blocks}]{\setlength{\rightskip}{0pt plus 5cm}{\bf uart\-\_\-communication\-\_\-blocks} {\bfseries } \hspace{0.3cm}{\ttfamily [Component]}}\label{classuart__wishbone__slave_1_1_behavioral_abe1057034c94a40f3d4c739676dea66c}
|
| 67 |
|
|
|
| 68 |
|
|
|
| 69 |
|
|
Global reset.
|
| 70 |
|
|
|
| 71 |
|
|
Global clock Number of cycles to wait in order to generate desired baud Byte to transmit Byte to receive Indicate that byte has been sent Indicate that we got a byte Uart serial out Uart serial in Initiate transmission
|
| 72 |
|
|
|
| 73 |
|
|
Definition at line 48 of file uart\-\_\-wishbone\-\_\-slave.\-vhd.
|
| 74 |
|
|
|
| 75 |
|
|
|
| 76 |
|
|
|
| 77 |
|
|
The documentation for this class was generated from the following file\-:\begin{DoxyCompactItemize}
|
| 78 |
|
|
\item
|
| 79 |
|
|
E\-:/uart\-\_\-block/hdl/ise\-Project/{\bf uart\-\_\-wishbone\-\_\-slave.\-vhd}\end{DoxyCompactItemize}
|
