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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
 
/*
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors.  Please refer to the
applicable agreement for further details.
*/
 
HEADER
{
        VERSION = 1;
        TIME_UNIT = ns;
        DATA_OFFSET = 0.0;
        DATA_DURATION = 100000.0;
        SIMULATION_TIME = 0.0;
        GRID_PHASE = 0.0;
        GRID_PERIOD = 10.0;
        GRID_DUTY_CYCLE = 50;
}
 
SIGNAL("clk_i")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = INPUT;
        PARENT = "";
}
 
SIGNAL("in0_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("in1_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("op0_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("op1_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("rst_i")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = INPUT;
        PARENT = "";
}
 
SIGNAL("we_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 12;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[11]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[10]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[9]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[8]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[7]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|ac_reg_s[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|ac_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 9;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[8]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[7]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|addr_bus_o[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|addr_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 9;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[8]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[7]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cd_reg_s[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cd_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|co_reg_s")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 3;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|co_reg_s[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|co_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|co_reg_s[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|co_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|co_reg_s[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|co_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 9;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[8]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[7]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|cp_reg_s[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|cp_reg_s";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 12;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[11]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[10]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[9]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[8]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[7]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
SIGNAL("usimplez_cpu:cpu|data_bus_o[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "usimplez_cpu:cpu|data_bus_o";
}
 
TRANSITION_LIST("clk_i")
{
        NODE
        {
                REPEAT = 1;
                NODE
                {
                        REPEAT = 2000;
                        LEVEL 0 FOR 25.0;
                        LEVEL 1 FOR 25.0;
                }
        }
}
 
TRANSITION_LIST("in0_o")
{
        NODE
        {
                REPEAT = 1;
                LEVEL X FOR 100000.0;
        }
}
 
TRANSITION_LIST("in1_o")
{
        NODE
        {
                REPEAT = 1;
                LEVEL X FOR 100000.0;
        }
}
 
TRANSITION_LIST("op0_o")
{
        NODE
        {
                REPEAT = 1;
                LEVEL X FOR 100000.0;
        }
}
 
TRANSITION_LIST("op1_o")
{
        NODE
        {
                REPEAT = 1;
                LEVEL X FOR 100000.0;
        }
}
 
TRANSITION_LIST("rst_i")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 4.0;
                LEVEL 1 FOR 12.8;
                LEVEL 0 FOR 99983.2;
        }
}
 
TRANSITION_LIST("we_o")
{
        NODE
        {
                REPEAT = 1;
                LEVEL X FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[11]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[10]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[9]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[8]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[7]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|ac_reg_s[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[8]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[7]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|addr_bus_o[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[8]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[7]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cd_reg_s[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|co_reg_s[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|co_reg_s[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|co_reg_s[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[8]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[7]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|cp_reg_s[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[11]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[10]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[9]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[8]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[7]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
TRANSITION_LIST("usimplez_cpu:cpu|data_bus_o[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL U FOR 100000.0;
        }
}
 
DISPLAY_LINE
{
        CHANNEL = "rst_i";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 0;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "clk_i";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 1;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "in0_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 2;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "in1_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 3;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "op0_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 4;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "op1_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 5;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "we_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 6;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 7;
        TREE_LEVEL = 0;
        CHILDREN = 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[11]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 8;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[10]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 9;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[9]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 10;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[8]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 11;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[7]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 12;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 13;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 14;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 15;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 16;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 17;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 18;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|ac_reg_s[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 19;
        TREE_LEVEL = 1;
        PARENT = 7;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 20;
        TREE_LEVEL = 0;
        CHILDREN = 21, 22, 23, 24, 25, 26, 27, 28, 29;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[8]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 21;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[7]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 22;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 23;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 24;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 25;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 26;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 27;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 28;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|addr_bus_o[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 29;
        TREE_LEVEL = 1;
        PARENT = 20;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 30;
        TREE_LEVEL = 0;
        CHILDREN = 31, 32, 33, 34, 35, 36, 37, 38, 39;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[8]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 31;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[7]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 32;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 33;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 34;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 35;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 36;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 37;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 38;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cd_reg_s[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 39;
        TREE_LEVEL = 1;
        PARENT = 30;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|co_reg_s";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 40;
        TREE_LEVEL = 0;
        CHILDREN = 41, 42, 43;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|co_reg_s[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 41;
        TREE_LEVEL = 1;
        PARENT = 40;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|co_reg_s[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 42;
        TREE_LEVEL = 1;
        PARENT = 40;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|co_reg_s[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 43;
        TREE_LEVEL = 1;
        PARENT = 40;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 44;
        TREE_LEVEL = 0;
        CHILDREN = 45, 46, 47, 48, 49, 50, 51, 52, 53;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[8]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 45;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[7]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 46;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 47;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 48;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 49;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 50;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 51;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 52;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|cp_reg_s[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 53;
        TREE_LEVEL = 1;
        PARENT = 44;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 54;
        TREE_LEVEL = 0;
        CHILDREN = 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[11]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 55;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[10]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 56;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[9]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 57;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[8]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 58;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[7]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 59;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 60;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 61;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 62;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 63;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 64;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 65;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
DISPLAY_LINE
{
        CHANNEL = "usimplez_cpu:cpu|data_bus_o[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = Unsigned;
        TREE_INDEX = 66;
        TREE_LEVEL = 1;
        PARENT = 54;
}
 
TIME_BAR
{
        TIME = 10200;
        MASTER = TRUE;
}
;

Line No.	Rev	Author	Line
1	2	pas.	`/*`
2			`WARNING: Do NOT edit the input and output ports in this file in a text`
3			`editor if you plan to continue editing the block that represents it in`
4			`the Block Editor! File corruption is VERY likely to occur.`
5			`*/`
6
7			`/*`
8			`Copyright (C) 1991-2010 Altera Corporation`
9			`Your use of Altera Corporation's design tools, logic functions`
10			`and other software and tools, and its AMPP partner logic`
11			`functions, and any output files from any of the foregoing`
12			`(including device programming or simulation files), and any`
13			`associated documentation or information are expressly subject`
14			`to the terms and conditions of the Altera Program License`
15			`Subscription Agreement, Altera MegaCore Function License`
16			`Agreement, or other applicable license agreement, including,`
17			`without limitation, that your use is for the sole purpose of`
18			`programming logic devices manufactured by Altera and sold by`
19			`Altera or its authorized distributors. Please refer to the`
20			`applicable agreement for further details.`
21			`*/`
22
23			`HEADER`
24			`{`
25			`VERSION = 1;`
26			`TIME_UNIT = ns;`
27			`DATA_OFFSET = 0.0;`
28			`DATA_DURATION = 100000.0;`
29			`SIMULATION_TIME = 0.0;`
30			`GRID_PHASE = 0.0;`
31			`GRID_PERIOD = 10.0;`
32			`GRID_DUTY_CYCLE = 50;`
33			`}`
34
35	3	pas.	`SIGNAL("clk_i")`
36	2	pas.	`{`
37			`VALUE_TYPE = NINE_LEVEL_BIT;`
38	3	pas.	`SIGNAL_TYPE = SINGLE_BIT;`
39			`WIDTH = 1;`
40			`LSB_INDEX = -1;`
41			`DIRECTION = INPUT;`
42			`PARENT = "";`
43			`}`
44
45			`SIGNAL("in0_o")`
46			`{`
47			`VALUE_TYPE = NINE_LEVEL_BIT;`
48			`SIGNAL_TYPE = SINGLE_BIT;`
49			`WIDTH = 1;`
50			`LSB_INDEX = -1;`
51			`DIRECTION = OUTPUT;`
52			`PARENT = "";`
53			`}`
54
55			`SIGNAL("in1_o")`
56			`{`
57			`VALUE_TYPE = NINE_LEVEL_BIT;`
58			`SIGNAL_TYPE = SINGLE_BIT;`
59			`WIDTH = 1;`
60			`LSB_INDEX = -1;`
61			`DIRECTION = OUTPUT;`
62			`PARENT = "";`
63			`}`
64
65			`SIGNAL("op0_o")`
66			`{`
67			`VALUE_TYPE = NINE_LEVEL_BIT;`
68			`SIGNAL_TYPE = SINGLE_BIT;`
69			`WIDTH = 1;`
70			`LSB_INDEX = -1;`
71			`DIRECTION = OUTPUT;`
72			`PARENT = "";`
73			`}`
74
75			`SIGNAL("op1_o")`
76			`{`
77			`VALUE_TYPE = NINE_LEVEL_BIT;`
78			`SIGNAL_TYPE = SINGLE_BIT;`
79			`WIDTH = 1;`
80			`LSB_INDEX = -1;`
81			`DIRECTION = OUTPUT;`
82			`PARENT = "";`
83			`}`
84
85			`SIGNAL("rst_i")`
86			`{`
87			`VALUE_TYPE = NINE_LEVEL_BIT;`
88			`SIGNAL_TYPE = SINGLE_BIT;`
89			`WIDTH = 1;`
90			`LSB_INDEX = -1;`
91			`DIRECTION = INPUT;`
92			`PARENT = "";`
93			`}`
94
95			`SIGNAL("we_o")`
96			`{`
97			`VALUE_TYPE = NINE_LEVEL_BIT;`
98			`SIGNAL_TYPE = SINGLE_BIT;`
99			`WIDTH = 1;`
100			`LSB_INDEX = -1;`
101			`DIRECTION = OUTPUT;`
102			`PARENT = "";`
103			`}`
104
105			`SIGNAL("usimplez_cpu:cpu\|ac_reg_s")`
106			`{`
107			`VALUE_TYPE = NINE_LEVEL_BIT;`
108	2	pas.	`SIGNAL_TYPE = BUS;`
109			`WIDTH = 12;`
110			`LSB_INDEX = 0;`
111			`DIRECTION = REGISTERED;`
112			`PARENT = "";`
113			`}`
114
115	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[11]")`
116	2	pas.	`{`
117			`VALUE_TYPE = NINE_LEVEL_BIT;`
118			`SIGNAL_TYPE = SINGLE_BIT;`
119			`WIDTH = 1;`
120			`LSB_INDEX = -1;`
121			`DIRECTION = REGISTERED;`
122	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
123	2	pas.	`}`
124
125	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[10]")`
126	2	pas.	`{`
127			`VALUE_TYPE = NINE_LEVEL_BIT;`
128			`SIGNAL_TYPE = SINGLE_BIT;`
129			`WIDTH = 1;`
130			`LSB_INDEX = -1;`
131			`DIRECTION = REGISTERED;`
132	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
133	2	pas.	`}`
134
135	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[9]")`
136	2	pas.	`{`
137			`VALUE_TYPE = NINE_LEVEL_BIT;`
138			`SIGNAL_TYPE = SINGLE_BIT;`
139			`WIDTH = 1;`
140			`LSB_INDEX = -1;`
141			`DIRECTION = REGISTERED;`
142	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
143	2	pas.	`}`
144
145	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[8]")`
146	2	pas.	`{`
147			`VALUE_TYPE = NINE_LEVEL_BIT;`
148			`SIGNAL_TYPE = SINGLE_BIT;`
149			`WIDTH = 1;`
150			`LSB_INDEX = -1;`
151			`DIRECTION = REGISTERED;`
152	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
153	2	pas.	`}`
154
155	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[7]")`
156	2	pas.	`{`
157			`VALUE_TYPE = NINE_LEVEL_BIT;`
158			`SIGNAL_TYPE = SINGLE_BIT;`
159			`WIDTH = 1;`
160			`LSB_INDEX = -1;`
161			`DIRECTION = REGISTERED;`
162	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
163	2	pas.	`}`
164
165	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[6]")`
166	2	pas.	`{`
167			`VALUE_TYPE = NINE_LEVEL_BIT;`
168			`SIGNAL_TYPE = SINGLE_BIT;`
169			`WIDTH = 1;`
170			`LSB_INDEX = -1;`
171			`DIRECTION = REGISTERED;`
172	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
173	2	pas.	`}`
174
175	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[5]")`
176	2	pas.	`{`
177			`VALUE_TYPE = NINE_LEVEL_BIT;`
178			`SIGNAL_TYPE = SINGLE_BIT;`
179			`WIDTH = 1;`
180			`LSB_INDEX = -1;`
181			`DIRECTION = REGISTERED;`
182	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
183	2	pas.	`}`
184
185	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[4]")`
186	2	pas.	`{`
187			`VALUE_TYPE = NINE_LEVEL_BIT;`
188			`SIGNAL_TYPE = SINGLE_BIT;`
189			`WIDTH = 1;`
190			`LSB_INDEX = -1;`
191			`DIRECTION = REGISTERED;`
192	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
193	2	pas.	`}`
194
195	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[3]")`
196	2	pas.	`{`
197			`VALUE_TYPE = NINE_LEVEL_BIT;`
198			`SIGNAL_TYPE = SINGLE_BIT;`
199			`WIDTH = 1;`
200			`LSB_INDEX = -1;`
201			`DIRECTION = REGISTERED;`
202	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
203	2	pas.	`}`
204
205	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[2]")`
206	2	pas.	`{`
207			`VALUE_TYPE = NINE_LEVEL_BIT;`
208			`SIGNAL_TYPE = SINGLE_BIT;`
209			`WIDTH = 1;`
210			`LSB_INDEX = -1;`
211			`DIRECTION = REGISTERED;`
212	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
213	2	pas.	`}`
214
215	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[1]")`
216	2	pas.	`{`
217			`VALUE_TYPE = NINE_LEVEL_BIT;`
218			`SIGNAL_TYPE = SINGLE_BIT;`
219			`WIDTH = 1;`
220			`LSB_INDEX = -1;`
221			`DIRECTION = REGISTERED;`
222	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
223	2	pas.	`}`
224
225	3	pas.	`SIGNAL("usimplez_cpu:cpu\|ac_reg_s[0]")`
226	2	pas.	`{`
227			`VALUE_TYPE = NINE_LEVEL_BIT;`
228			`SIGNAL_TYPE = SINGLE_BIT;`
229			`WIDTH = 1;`
230			`LSB_INDEX = -1;`
231			`DIRECTION = REGISTERED;`
232	3	pas.	`PARENT = "usimplez_cpu:cpu\|ac_reg_s";`
233	2	pas.	`}`
234
235			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o")`
236			`{`
237			`VALUE_TYPE = NINE_LEVEL_BIT;`
238			`SIGNAL_TYPE = BUS;`
239			`WIDTH = 9;`
240			`LSB_INDEX = 0;`
241			`DIRECTION = REGISTERED;`
242			`PARENT = "";`
243			`}`
244
245			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[8]")`
246			`{`
247			`VALUE_TYPE = NINE_LEVEL_BIT;`
248			`SIGNAL_TYPE = SINGLE_BIT;`
249			`WIDTH = 1;`
250			`LSB_INDEX = -1;`
251			`DIRECTION = REGISTERED;`
252			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
253			`}`
254
255			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[7]")`
256			`{`
257			`VALUE_TYPE = NINE_LEVEL_BIT;`
258			`SIGNAL_TYPE = SINGLE_BIT;`
259			`WIDTH = 1;`
260			`LSB_INDEX = -1;`
261			`DIRECTION = REGISTERED;`
262			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
263			`}`
264
265			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[6]")`
266			`{`
267			`VALUE_TYPE = NINE_LEVEL_BIT;`
268			`SIGNAL_TYPE = SINGLE_BIT;`
269			`WIDTH = 1;`
270			`LSB_INDEX = -1;`
271			`DIRECTION = REGISTERED;`
272			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
273			`}`
274
275			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[5]")`
276			`{`
277			`VALUE_TYPE = NINE_LEVEL_BIT;`
278			`SIGNAL_TYPE = SINGLE_BIT;`
279			`WIDTH = 1;`
280			`LSB_INDEX = -1;`
281			`DIRECTION = REGISTERED;`
282			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
283			`}`
284
285			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[4]")`
286			`{`
287			`VALUE_TYPE = NINE_LEVEL_BIT;`
288			`SIGNAL_TYPE = SINGLE_BIT;`
289			`WIDTH = 1;`
290			`LSB_INDEX = -1;`
291			`DIRECTION = REGISTERED;`
292			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
293			`}`
294
295			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[3]")`
296			`{`
297			`VALUE_TYPE = NINE_LEVEL_BIT;`
298			`SIGNAL_TYPE = SINGLE_BIT;`
299			`WIDTH = 1;`
300			`LSB_INDEX = -1;`
301			`DIRECTION = REGISTERED;`
302			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
303			`}`
304
305			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[2]")`
306			`{`
307			`VALUE_TYPE = NINE_LEVEL_BIT;`
308			`SIGNAL_TYPE = SINGLE_BIT;`
309			`WIDTH = 1;`
310			`LSB_INDEX = -1;`
311			`DIRECTION = REGISTERED;`
312			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
313			`}`
314
315			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[1]")`
316			`{`
317			`VALUE_TYPE = NINE_LEVEL_BIT;`
318			`SIGNAL_TYPE = SINGLE_BIT;`
319			`WIDTH = 1;`
320			`LSB_INDEX = -1;`
321			`DIRECTION = REGISTERED;`
322			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
323			`}`
324
325			`SIGNAL("usimplez_cpu:cpu\|addr_bus_o[0]")`
326			`{`
327			`VALUE_TYPE = NINE_LEVEL_BIT;`
328			`SIGNAL_TYPE = SINGLE_BIT;`
329			`WIDTH = 1;`
330			`LSB_INDEX = -1;`
331			`DIRECTION = REGISTERED;`
332			`PARENT = "usimplez_cpu:cpu\|addr_bus_o";`
333			`}`
334
335			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s")`
336			`{`
337			`VALUE_TYPE = NINE_LEVEL_BIT;`
338			`SIGNAL_TYPE = BUS;`
339			`WIDTH = 9;`
340			`LSB_INDEX = 0;`
341			`DIRECTION = REGISTERED;`
342			`PARENT = "";`
343			`}`
344
345			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[8]")`
346			`{`
347			`VALUE_TYPE = NINE_LEVEL_BIT;`
348			`SIGNAL_TYPE = SINGLE_BIT;`
349			`WIDTH = 1;`
350			`LSB_INDEX = -1;`
351			`DIRECTION = REGISTERED;`
352			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
353			`}`
354
355			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[7]")`
356			`{`
357			`VALUE_TYPE = NINE_LEVEL_BIT;`
358			`SIGNAL_TYPE = SINGLE_BIT;`
359			`WIDTH = 1;`
360			`LSB_INDEX = -1;`
361			`DIRECTION = REGISTERED;`
362			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
363			`}`
364
365			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[6]")`
366			`{`
367			`VALUE_TYPE = NINE_LEVEL_BIT;`
368			`SIGNAL_TYPE = SINGLE_BIT;`
369			`WIDTH = 1;`
370			`LSB_INDEX = -1;`
371			`DIRECTION = REGISTERED;`
372			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
373			`}`
374
375			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[5]")`
376			`{`
377			`VALUE_TYPE = NINE_LEVEL_BIT;`
378			`SIGNAL_TYPE = SINGLE_BIT;`
379			`WIDTH = 1;`
380			`LSB_INDEX = -1;`
381			`DIRECTION = REGISTERED;`
382			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
383			`}`
384
385			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[4]")`
386			`{`
387			`VALUE_TYPE = NINE_LEVEL_BIT;`
388			`SIGNAL_TYPE = SINGLE_BIT;`
389			`WIDTH = 1;`
390			`LSB_INDEX = -1;`
391			`DIRECTION = REGISTERED;`
392			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
393			`}`
394
395			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[3]")`
396			`{`
397			`VALUE_TYPE = NINE_LEVEL_BIT;`
398			`SIGNAL_TYPE = SINGLE_BIT;`
399			`WIDTH = 1;`
400			`LSB_INDEX = -1;`
401			`DIRECTION = REGISTERED;`
402			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
403			`}`
404
405			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[2]")`
406			`{`
407			`VALUE_TYPE = NINE_LEVEL_BIT;`
408			`SIGNAL_TYPE = SINGLE_BIT;`
409			`WIDTH = 1;`
410			`LSB_INDEX = -1;`
411			`DIRECTION = REGISTERED;`
412			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
413			`}`
414
415			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[1]")`
416			`{`
417			`VALUE_TYPE = NINE_LEVEL_BIT;`
418			`SIGNAL_TYPE = SINGLE_BIT;`
419			`WIDTH = 1;`
420			`LSB_INDEX = -1;`
421			`DIRECTION = REGISTERED;`
422			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
423			`}`
424
425			`SIGNAL("usimplez_cpu:cpu\|cd_reg_s[0]")`
426			`{`
427			`VALUE_TYPE = NINE_LEVEL_BIT;`
428			`SIGNAL_TYPE = SINGLE_BIT;`
429			`WIDTH = 1;`
430			`LSB_INDEX = -1;`
431			`DIRECTION = REGISTERED;`
432			`PARENT = "usimplez_cpu:cpu\|cd_reg_s";`
433			`}`
434
435			`SIGNAL("usimplez_cpu:cpu\|co_reg_s")`
436			`{`
437			`VALUE_TYPE = NINE_LEVEL_BIT;`
438			`SIGNAL_TYPE = BUS;`
439			`WIDTH = 3;`
440			`LSB_INDEX = 0;`
441			`DIRECTION = REGISTERED;`
442			`PARENT = "";`
443			`}`
444
445			`SIGNAL("usimplez_cpu:cpu\|co_reg_s[2]")`
446			`{`
447			`VALUE_TYPE = NINE_LEVEL_BIT;`
448			`SIGNAL_TYPE = SINGLE_BIT;`
449			`WIDTH = 1;`
450			`LSB_INDEX = -1;`
451			`DIRECTION = REGISTERED;`
452			`PARENT = "usimplez_cpu:cpu\|co_reg_s";`
453			`}`
454
455			`SIGNAL("usimplez_cpu:cpu\|co_reg_s[1]")`
456			`{`
457			`VALUE_TYPE = NINE_LEVEL_BIT;`
458			`SIGNAL_TYPE = SINGLE_BIT;`
459			`WIDTH = 1;`
460			`LSB_INDEX = -1;`
461			`DIRECTION = REGISTERED;`
462			`PARENT = "usimplez_cpu:cpu\|co_reg_s";`
463			`}`
464
465			`SIGNAL("usimplez_cpu:cpu\|co_reg_s[0]")`
466			`{`
467			`VALUE_TYPE = NINE_LEVEL_BIT;`
468			`SIGNAL_TYPE = SINGLE_BIT;`
469			`WIDTH = 1;`
470			`LSB_INDEX = -1;`
471			`DIRECTION = REGISTERED;`
472			`PARENT = "usimplez_cpu:cpu\|co_reg_s";`
473			`}`
474
475			`SIGNAL("usimplez_cpu:cpu\|cp_reg_s")`
476			`{`
477			`VALUE_TYPE = NINE_LEVEL_BIT;`
478			`SIGNAL_TYPE = BUS;`
479			`WIDTH = 9;`
480			`LSB_INDEX = 0;`
481			`DIRECTION = REGISTERED;`
482			`PARENT = "";`
483			`}`
484
485			`SIGNAL("usimplez_cpu:cpu\|cp_reg_s[8]")`
486			`{`
487			`VALUE_TYPE = NINE_LEVEL_BIT;`
488			`SIGNAL_TYPE = SINGLE_BIT;`
489			`WIDTH = 1;`
490			`LSB_INDEX = -1;`
491			`DIRECTION = REGISTERED;`
492			`PARENT = "usimplez_cpu:cpu\|cp_reg_s";`
493			`}`
494
495			`SIGNAL("usimplez_cpu:cpu\|cp_reg_s[7]")`
496			`{`
497			`VALUE_TYPE = NINE_LEVEL_BIT;`
498			`SIGNAL_TYPE = SINGLE_BIT;`
499			`WIDTH = 1;`
500			`LSB_INDEX = -1;`

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[/] [usimplez/] [trunk/] [QuartusII/] [usimplez_top.vwf] - Blame information for rev 3

Line No.	Rev	Author	Line
1	2	pas.	`/*`
2			`WARNING: Do NOT edit the input and output ports in this file in a text`
3			`editor if you plan to continue editing the block that represents it in`
4			`the Block Editor! File corruption is VERY likely to occur.`
5			`*/`
6
7			`/*`
8			`Copyright (C) 1991-2010 Altera Corporation`
9			`Your use of Altera Corporation's design tools, logic functions`
10			`and other software and tools, and its AMPP partner logic`
11			`functions, and any output files from any of the foregoing`
12			`(including device programming or simulation files), and any`
13			`associated documentation or information are expressly subject`
14			`to the terms and conditions of the Altera Program License`
15			`Subscription Agreement, Altera MegaCore Function License`
16			`Agreement, or other applicable license agreement, including,`
17			`without limitation, that your use is for the sole purpose of`
18			`programming logic devices manufactured by Altera and sold by`
19			`Altera or its authorized distributors. Please refer to the`
20			`applicable agreement for further details.`
21			`*/`
22
23			`HEADER`
24			`{`
25			`VERSION = 1;`
26			`TIME_UNIT = ns;`
27			`DATA_OFFSET = 0.0;`
28			`DATA_DURATION = 100000.0;`
29			`SIMULATION_TIME = 0.0;`
30			`GRID_PHASE = 0.0;`
31			`GRID_PERIOD = 10.0;`
32			`GRID_DUTY_CYCLE = 50;`
33			`}`
34
35	3	pas.	`SIGNAL("clk_i")`
36	2	pas.	`{`
37			`VALUE_TYPE = NINE_LEVEL_BIT;`
38	3	pas.	`SIGNAL_TYPE = SINGLE_BIT;`
39			`WIDTH = 1;`
40			`LSB_INDEX = -1;`