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[/] [wb4pb/] [trunk/] [sim/] [hdl/] [picoblaze_wb_uart_tb.v] - Blame information for rev 18

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1 15 ste.fis
////////////////////////////////////////////////////////////////////////////////
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// This sourcecode is released under BSD license.
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// Please see http://www.opensource.org/licenses/bsd-license.php for details!
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2010, Stefan Fischer <Ste.Fis@OpenCores.org>
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without 
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// modification, are permitted provided that the following conditions are met:
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//
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//  * Redistributions of source code must retain the above copyright notice, 
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//    this list of conditions and the following disclaimer.
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//  * Redistributions in binary form must reproduce the above copyright notice,
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//    this list of conditions and the following disclaimer in the documentation
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//    and/or other materials provided with the distribution. 
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//  * Neither the name of the author nor the names of his contributors may be 
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//    used to endorse or promote products derived from this software without 
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//    specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
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// POSSIBILITY OF SUCH DAMAGE.
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//
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////////////////////////////////////////////////////////////////////////////////
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// filename: picoblaze_wb_uart_tb.v
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// description: testbench for picoblaze_wb_uart example
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// todo4user: modify stimulus as needed
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// version: 0.0.0
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// changelog: - 0.0.0, initial release
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//            - ...
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////////////////////////////////////////////////////////////////////////////////
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`uselib lib = unisims_ver
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`timescale 1 ns / 1 ps
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module picoblaze_wb_uart_tb;
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  reg rst_n;
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  reg clk;
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  wire uart_rx_si;
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  wire uart_tx_so;
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  parameter PERIOD = 20;
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  // system signal generation
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  initial begin
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    clk = 1'b1;
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    rst_n = 1'b0;
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    #(PERIOD*2) rst_n = 1'b1;
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  end
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  always #(PERIOD/2) clk = ! clk;
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  // simple serial loopback
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  assign uart_rx_si = uart_tx_so;
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  // design under test instance
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  picoblaze_wb_uart dut (
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    .p_rst_n_i(rst_n),
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    .p_clk_i(clk),
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    .p_uart_rx_si_i(uart_rx_si),
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    .p_uart_tx_so_o(uart_tx_so)
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  );
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endmodule

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