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https://opencores.org/ocsvn/wiegand_ctl/wiegand_ctl/trunk
[/] [wiegand_ctl/] [trunk/] [sim/] [compile_hw.do.bak] - Blame information for rev 16
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jeaander |
# common files for both modules
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wb_interface.v
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/fifos.v
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# uncomment to compile Wiegand TX
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_tx_top.v
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# uncomment to compile Wiegand RX
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_rx_top.v
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# testbench stuff
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench/testbench_top.v
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench/testcase_1.v
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wb_interface.v
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/fifos.v
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# uncomment to compile Wiegand TX
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_tx_top.v
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# uncomment to compile Wiegand RX
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_rx_top.v
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# testbench stuff
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench/testbench_top.v
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vlog -work work +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench +incdir+C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog C:/Users/jeffA/Desktop/rtl/wiegand/trunk/bench/testcase_1.v
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