OpenCores
URL https://opencores.org/ocsvn/xmatchpro/xmatchpro/trunk

Subversion Repositories xmatchpro

[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [src/] [count_delay.vhd] - Blame information for rev 8

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 8 eejlny
--This library is free software; you can redistribute it and/or
2
--modify it under the terms of the GNU Lesser General Public
3
--License as published by the Free Software Foundation; either
4
--version 2.1 of the License, or (at your option) any later version.
5
 
6
--This library is distributed in the hope that it will be useful,
7
--but WITHOUT ANY WARRANTY; without even the implied warranty of
8
--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
9
--Lesser General Public License for more details.
10
 
11
--You should have received a copy of the GNU Lesser General Public
12
--License along with this library; if not, write to the Free Software
13
--Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
14
 
15
-- e_mail : j.l.nunez-yanez@byacom.co.uk
16
 
17
--------------------------------------------------
18
--  ENTITY       = COUNT_DELAY                  --
19
--  version      = 1.0                          --
20
--  last update  = 22/11/99                     --
21
--  author       = Jose Nunez                   --
22
--------------------------------------------------
23
 
24
 
25
-- FUNCTION
26
-- count delay register so the count is not lost during the RLI process
27
 
28
 
29
-- PIN LIST 
30
-- COUNT_IN : 8 bit count in
31
-- CLEAR : asyncronous clear
32
-- CLK : master clock 
33
-- COUNT_OUT : 8 bit count out
34
 
35
library IEEE;
36
use IEEE.std_logic_1164.all;
37
 
38
entity COUNT_DELAY is
39
port         (
40
                        COUNT_IN : in bit_vector(7 downto 0);
41
                        CLEAR: in bit;
42
                        RESET : in bit;
43
                        CLK : in bit;
44
                        COUNT_OUT :out bit_vector(7 downto 0)
45
 
46
                );
47
end COUNT_DELAY;
48
 
49
architecture STRUCTURAL of COUNT_DELAY is
50
 
51
 
52
signal COUNT_aux_1: bit_vector(7 downto 0); -- delay 1
53
signal COUNT_aux_2: bit_vector(7 downto 0); -- delay 2
54
 
55
 
56
begin
57
 
58
 process(CLK,CLEAR)
59
 begin
60
        if (CLEAR='0') then
61
          COUNT_aux_1<="00000000";
62
                  COUNT_aux_2<="00000000";
63
        elsif ((CLK'event) and (CLK='1')) then
64
                  if (RESET='0') then
65
                COUNT_aux_1<="00000000";
66
                        COUNT_aux_2<="00000000";
67
                  else
68
                        COUNT_aux_1<=COUNT_IN;
69
                        COUNT_aux_2<=COUNT_aux_1;
70
          end if;
71
        end if;
72
 end process;
73
 
74
COUNT_OUT<=COUNT_aux_2;
75
 
76
end structural;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.