URL
https://opencores.org/ocsvn/xmatchpro/xmatchpro/trunk
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eejlny |
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7 |
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9 |
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window new WaveWindow -name "Waves for BMG Example Design"
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11 |
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waveform using "Waves for BMG Example Design"
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12 |
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13 |
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14 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/status
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15 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/CLKA
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16 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ADDRA
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17 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DINA
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18 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/WEA
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19 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DOUTA
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20 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/CLKB
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21 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ADDRB
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22 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ENB
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23 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DINB
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24 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/WEB
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25 |
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waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DOUTB
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26 |
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console submit -using simulator -wait no "run"
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