OpenCores
URL https://opencores.org/ocsvn/xucpu/xucpu/trunk

Subversion Repositories xucpu

[/] [xucpu/] [trunk/] [VHDL/] [ALU.vhdl] - Blame information for rev 40

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 lcdsgmtr
-- Copyright 2015, Jürgen Defurne
2
--
3
-- This file is part of the Experimental Unstable CPU System.
4
--
5
-- The Experimental Unstable CPU System Is free software: you can redistribute
6
-- it and/or modify it under the terms of the GNU Lesser General Public License
7
-- as published by the Free Software Foundation, either version 3 of the
8
-- License, or (at your option) any later version.
9
--
10
-- The Experimental Unstable CPU System is distributed in the hope that it will
11
-- be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
12
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser
13
-- General Public License for more details.
14
--
15
-- You should have received a copy of the GNU Lesser General Public License
16
-- along with Experimental Unstable CPU System. If not, see
17
-- http://www.gnu.org/licenses/lgpl.txt.
18
 
19 40 lcdsgmtr
LIBRARY ieee;
20
USE ieee.STD_LOGIC_1164.ALL;
21
USE ieee.NUMERIC_STD.ALL;
22 2 lcdsgmtr
 
23 40 lcdsgmtr
ENTITY alu IS
24
  GENERIC(
25
    w_data : NATURAL RANGE 1 TO 32 := 16);
26
  PORT(
27
    op : IN  STD_LOGIC_VECTOR(3 DOWNTO 0);
28
    A  : IN  STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
29
    B  : IN  STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
30
    Y  : OUT STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0));
31 2 lcdsgmtr
 
32 40 lcdsgmtr
  FUNCTION alu_add (
33
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
34
    SIGNAL B : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
35
    RETURN STD_LOGIC_VECTOR;
36 2 lcdsgmtr
 
37 40 lcdsgmtr
  FUNCTION alu_add(
38
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
39
    SIGNAL B : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
40
    RETURN STD_LOGIC_VECTOR IS
41
  BEGIN  -- alu_add
42
    RETURN STD_LOGIC_VECTOR(UNSIGNED(A) + UNSIGNED(B));
43
  END alu_add;
44 2 lcdsgmtr
 
45 40 lcdsgmtr
  FUNCTION alu_sub (
46
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
47
    SIGNAL B : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
48
    RETURN STD_LOGIC_VECTOR;
49 2 lcdsgmtr
 
50 40 lcdsgmtr
  FUNCTION alu_sub(
51
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0);
52
    SIGNAL B : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
53
    RETURN STD_LOGIC_VECTOR IS
54
  BEGIN  -- alu_sub
55
    RETURN STD_LOGIC_VECTOR(UNSIGNED(A) - UNSIGNED(B));
56
  END alu_sub;
57 2 lcdsgmtr
 
58 40 lcdsgmtr
  FUNCTION alu_inc (
59
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
60
    RETURN STD_LOGIC_VECTOR;
61 2 lcdsgmtr
 
62 40 lcdsgmtr
  FUNCTION alu_inc (
63
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
64
    RETURN STD_LOGIC_VECTOR IS
65
  BEGIN
66
    RETURN STD_LOGIC_VECTOR(UNSIGNED(A) + 1);
67
  END alu_inc;
68 2 lcdsgmtr
 
69 40 lcdsgmtr
  FUNCTION alu_dec (
70
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
71
    RETURN STD_LOGIC_VECTOR;
72 2 lcdsgmtr
 
73 40 lcdsgmtr
  FUNCTION alu_dec (
74
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
75
    RETURN STD_LOGIC_VECTOR IS
76
  BEGIN
77
    RETURN STD_LOGIC_VECTOR(UNSIGNED(A) - 1);
78
  END alu_dec;
79 2 lcdsgmtr
 
80 40 lcdsgmtr
  FUNCTION shift_left (
81
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
82
    RETURN STD_LOGIC_VECTOR;
83 2 lcdsgmtr
 
84 40 lcdsgmtr
  FUNCTION shift_left (
85
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
86
    RETURN STD_LOGIC_VECTOR IS
87
  BEGIN
88
    RETURN STD_LOGIC_VECTOR(shift_left(UNSIGNED(A), 1));
89
  END shift_left;
90 2 lcdsgmtr
 
91 40 lcdsgmtr
  FUNCTION shift_right (
92
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
93
    RETURN STD_LOGIC_VECTOR;
94 2 lcdsgmtr
 
95 40 lcdsgmtr
  FUNCTION shift_right (
96
    SIGNAL A : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0))
97
    RETURN STD_LOGIC_VECTOR IS
98
  BEGIN
99
    RETURN STD_LOGIC_VECTOR(shift_right(UNSIGNED(A), 1));
100
  END shift_right;
101 2 lcdsgmtr
 
102 40 lcdsgmtr
END ENTITY alu;
103 2 lcdsgmtr
 
104 40 lcdsgmtr
ARCHITECTURE Behavioral OF alu IS
105
 
106
  CONSTANT ZERO : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0)
107
    := STD_LOGIC_VECTOR(TO_UNSIGNED(0, w_data));
108
  CONSTANT ONE : STD_LOGIC_VECTOR(w_data - 1 DOWNTO 0)
109
    := STD_LOGIC_VECTOR(TO_UNSIGNED(1, w_data));
110
 
111
BEGIN  -- ARCHITECTURE Behavioral
112
 
113
  WITH op SELECT
114
    y <=
115
    alu_inc(A)     WHEN "0000",
116
    alu_dec(A)     WHEN "0001",
117
    ZERO           WHEN "0010",         -- Place holder
118
    ONE            WHEN "0011",         -- Place holder
119
    B WHEN "0100",
120
    A WHEN "0101",                      -- Place holder
121
    A WHEN "0110",                      -- Place holder
122
    alu_add(A, B)  WHEN "0111",
123
    alu_sub(A, B)  WHEN "1000",
124
    A WHEN "1001",                      -- Place holder
125
    A AND B        WHEN "1010",
126
    A OR B         WHEN "1011",
127
    A XOR B        WHEN "1100",
128
    NOT A          WHEN "1101",
129
    shift_left(A)  WHEN "1110",
130
    shift_right(A) WHEN "1111",
131
    A WHEN OTHERS;
132
 
133
END ARCHITECTURE Behavioral;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.