OpenCores
URL https://opencores.org/ocsvn/xucpu/xucpu/trunk

Subversion Repositories xucpu

[/] [xucpu/] [trunk/] [src/] [components/] [BRAM/] [tb_generic_ram.gtkw] - Blame information for rev 26

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 26 lcdsgmtr
[*]
2
[*] GTKWave Analyzer v3.3.48 (w)1999-2013 BSI
3
[*] Wed Oct  7 17:22:15 2015
4
[*]
5
[dumpfile] "/Users/jurgen/local/shared/BAZAAR/xucpu/src/components/BRAM/tb_generic_ram.ghw"
6
[dumpfile_mtime] "Wed Oct  7 17:20:11 2015"
7
[dumpfile_size] 27092
8
[savefile] "/Users/jurgen/local/shared/BAZAAR/xucpu/src/components/BRAM/tb_generic_ram.gtkw"
9
[timestart] 1290400000
10
[size] 1276 756
11
[pos] -21 -21
12
*-26.076551 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
13
[treeopen] top.
14
[treeopen] top.tb_generic_ram.
15
[treeopen] top.tb_generic_ram.ram1.
16
[sst_width] 203
17
[signals_width] 94
18
[sst_expanded] 1
19
[sst_vpaned_height] 212
20
@28
21
top.tb_generic_ram.ctr_a
22
top.tb_generic_ram.we
23
top.tb_generic_ram.clock
24
top.tb_generic_ram.ram1.we
25
top.tb_generic_ram.ram1.clk
26
@22
27
#{top.tb_generic_ram.ram1.q2[15:0]} top.tb_generic_ram.ram1.q2[15] top.tb_generic_ram.ram1.q2[14] top.tb_generic_ram.ram1.q2[13] top.tb_generic_ram.ram1.q2[12] top.tb_generic_ram.ram1.q2[11] top.tb_generic_ram.ram1.q2[10] top.tb_generic_ram.ram1.q2[9] top.tb_generic_ram.ram1.q2[8] top.tb_generic_ram.ram1.q2[7] top.tb_generic_ram.ram1.q2[6] top.tb_generic_ram.ram1.q2[5] top.tb_generic_ram.ram1.q2[4] top.tb_generic_ram.ram1.q2[3] top.tb_generic_ram.ram1.q2[2] top.tb_generic_ram.ram1.q2[1] top.tb_generic_ram.ram1.q2[0]
28
@23
29
#{top.tb_generic_ram.ram1.q1[15:0]} top.tb_generic_ram.ram1.q1[15] top.tb_generic_ram.ram1.q1[14] top.tb_generic_ram.ram1.q1[13] top.tb_generic_ram.ram1.q1[12] top.tb_generic_ram.ram1.q1[11] top.tb_generic_ram.ram1.q1[10] top.tb_generic_ram.ram1.q1[9] top.tb_generic_ram.ram1.q1[8] top.tb_generic_ram.ram1.q1[7] top.tb_generic_ram.ram1.q1[6] top.tb_generic_ram.ram1.q1[5] top.tb_generic_ram.ram1.q1[4] top.tb_generic_ram.ram1.q1[3] top.tb_generic_ram.ram1.q1[2] top.tb_generic_ram.ram1.q1[1] top.tb_generic_ram.ram1.q1[0]
30
[pattern_trace] 1
31
[pattern_trace] 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.