Subversion Repositories xucpu

-- This is the architecture of the board

-- It defines the bus system and is used as the main structure

-- to add devices.

-- These devices can be:

-- - Memory

-- - Cache controller

-- - CPU

-- - Input devices

-- - Output devices

-- The main goal of the system is to provide the bus, the bus

-- controller for arbitration between bus masters, the control

-- signals, the data and address signals, the data protocol

-- and the address decoding.

-- It should be possible to generate this file based upon a

-- description of the different devices.

ARCHITECTURE Structural OF board IS

  -- Definition of bus signals

  SIGNAL data_bus    : STD_LOGIC_VECTOR(15 DOWNTO 0);

  SIGNAL address_bus : STD_LOGIC_VECTOR(14 DOWNTO 0);

  SIGNAL bus_read    : STD_LOGIC;

  SIGNAL bus_write   : STD_LOGIC;

  SIGNAL bus_wait    : STD_LOGIC;

  SIGNAL bus_ack     : STD_LOGIC;

  -- Definition of components related to the bus

  COMPONENT data_mux IS

    PORT (

      data_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0));

  END COMPONENT data_mux;

  COMPONENT address_mux IS

    PORT (

      address_in : IN STD_LOGIC_VECTOR(14 DOWNTO 0));

  END COMPONENT address_mux;

  COMPONENT address_decoder IS

    PORT (

      address_in : IN STD_LOGIC_VECTOR(14 DOWNTO 0));

  END COMPONENT address_decoder;

  COMPONENT bus_arbiter IS

  END COMPONENT bus_arbiter;

  -- Definition of components attached to the bus

BEGIN  -- ARCHITECTURE Structural

  -- Mapping of bus related components

  -- Mapping of system devices

  -- Main memory

  -- Instruction cache

  -- Data cache

  -- LED output device

  -- Push button input device

  -- Slide switch input device

  -- Serial communication device

  -- MAC device

  -- DVI device

  -- Character based device

END ARCHITECTURE Structural;