URL https://opencores.org/ocsvn/xucpu/xucpu/trunk

Subversion Repositories xucpu

[/] [xucpu/] [trunk/] [target/] [Xilinx/] [32k/] [iseconfig/] [mem_32k_xucpu.projectmgr] - Blame information for rev 41

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         2
         /RAM32K - Structural |home|jurgen|Projects|xucpu|src|components|BRAM|RAM.vhdl
         /clock_gen - Behavioral |home|jurgen|Projects|xucpu|src|system|clock.vhdl
         /memory - Structural |home|jurgen|Projects|xucpu|src|components|BRAM|RAM.vhdl
         /mux32to1 - Behavioral |home|jurgen|Projects|xucpu|src|components|multiplexer|MUX.vhdl
         /summation - Behavioral |home|jurgen|Projects|xucpu|src|components|ALU|summation.vhdl
         /system - Structural |home|jurgen|Projects|xucpu|src|system|system.vhdl
         /system - Structural |home|jurgen|Projects|xucpu|src|system|system_mem_32k.vhdl
         /system - Structural |home|jurgen|Projects|xucpu|src|system|system_mem_32k.vhdl/MEM1 - RAM32K - Structural
      
      
         system - Structural (/home/jurgen/Projects/xucpu/src/system/system_mem_32k.vhdl)
      
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000294000000020000000000000000000000000200000064ffffffff000000810000000300000002000002940000000100000003000000000000000100000003
      false
      system - Structural (/home/jurgen/Projects/xucpu/src/system/system_mem_32k.vhdl)
   
   
      
         1
         Configure Target Device
         Implement Design/Map
         Implement Design/Place & Route/Back-annotate Pin Locations
         Implement Design/Place & Route/Generate IBIS Model
         Implement Design/Translate
         User Constraints
      
      
         
      
      12
      0
      000000ff0000000000000001000000010000000000000000000000000000000000000000000000010f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000010f0000000100000000
      false
      
   
   
      
         1
      
      
         /home/jurgen/Projects/xucpu/src/components/components.vhdl
      
      0
      0
      000000ff0000000000000001000000000000000001000000000000000000000000000000000000038d000000040101000100000000000000000000000064ffffffff000000810000000000000004000001c70000000100000000000000d00000000100000000000000840000000100000000000000720000000100000000
      false
      /home/jurgen/Projects/xucpu/src/components/components.vhdl
   
   
      
         1
         work
      
      
      0
      0
      000000ff00000000000000010000000000000000010000000000000000000000000000000000000121000000010001000100000000000000000000000064ffffffff000000810000000000000001000001210000000100000000
      false
      work
   
   
      
         1
         Design Utilities/Compile HDL Simulation Libraries
      
      
         Design Utilities
      
      0
      0
      000000ff0000000000000001000000010000000000000000000000000000000000000000000000011f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000011f0000000100000000
      false
      Design Utilities
   
   000000ff0000000000000002000000f0000000c801000000060100000002
   Implementation
   
      
         2
         /mux32to1 - Behavioral |home|jurgen|Projects|xucpu|src|components|multiplexer|MUX.vhdl
         /startup_sim - behavior |home|jurgen|Projects|xucpu|tb|startup_sim.vhdl
         /summation - Behavioral |home|jurgen|Projects|xucpu|src|components|ALU|summation.vhdl
      
      
         startup_sim - behavior (/home/jurgen/Projects/xucpu/tb/startup_sim.vhdl)
      
      1
      0
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      startup_sim - behavior (/home/jurgen/Projects/xucpu/tb/startup_sim.vhdl)
   
   
      
         1
         Design Utilities
      
      
         
      
      0
      0
      000000ff0000000000000001000000010000000000000000000000000000000000000000000000011f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000011f0000000100000000
      false
      
   
   
      
         1
         ISim Simulator
      
      
         
      
      0
      0
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      false
      
   
   


Line No.	Rev	Author	Line
1	29	lcdsgmtr
2	28	lcdsgmtr
3
4
5
6
7
8
9			`2`
10			`/RAM32K - Structural \|home\|jurgen\|Projects\|xucpu\|src\|components\|BRAM\|RAM.vhdl`
11			`/clock_gen - Behavioral \|home\|jurgen\|Projects\|xucpu\|src\|system\|clock.vhdl`
12			`/memory - Structural \|home\|jurgen\|Projects\|xucpu\|src\|components\|BRAM\|RAM.vhdl`
13			`/mux32to1 - Behavioral \|home\|jurgen\|Projects\|xucpu\|src\|components\|multiplexer\|MUX.vhdl`
14			`/summation - Behavioral \|home\|jurgen\|Projects\|xucpu\|src\|components\|ALU\|summation.vhdl`
15			`/system - Structural \|home\|jurgen\|Projects\|xucpu\|src\|system\|system.vhdl`
16	29	lcdsgmtr	`/system - Structural \|home\|jurgen\|Projects\|xucpu\|src\|system\|system_mem_32k.vhdl`
17	28	lcdsgmtr	`/system - Structural \|home\|jurgen\|Projects\|xucpu\|src\|system\|system_mem_32k.vhdl/MEM1 - RAM32K - Structural`
18
19
20			`system - Structural (/home/jurgen/Projects/xucpu/src/system/system_mem_32k.vhdl)`
21
22	29	lcdsgmtr	`0`
23	28	lcdsgmtr	`0`
24	29	lcdsgmtr	`000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000294000000020000000000000000000000000200000064ffffffff000000810000000300000002000002940000000100000003000000000000000100000003`
25	28	lcdsgmtr	`false`
26			`system - Structural (/home/jurgen/Projects/xucpu/src/system/system_mem_32k.vhdl)`
27
28
29
30			`1`
31			`Configure Target Device`
32	29	lcdsgmtr	`Implement Design/Map`
33			`Implement Design/Place & Route/Back-annotate Pin Locations`
34			`Implement Design/Place & Route/Generate IBIS Model`
35			`Implement Design/Translate`
36	28	lcdsgmtr	`User Constraints`
37
38
39
40
41	29	lcdsgmtr	`12`
42	28	lcdsgmtr	`0`
43			`000000ff0000000000000001000000010000000000000000000000000000000000000000000000010f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000010f0000000100000000`
44			`false`
45
46
47
48
49			`1`
50
51
52			`/home/jurgen/Projects/xucpu/src/components/components.vhdl`
53
54			`0`
55			`0`
56			`000000ff0000000000000001000000000000000001000000000000000000000000000000000000038d000000040101000100000000000000000000000064ffffffff000000810000000000000004000001c70000000100000000000000d00000000100000000000000840000000100000000000000720000000100000000`
57			`false`
58			`/home/jurgen/Projects/xucpu/src/components/components.vhdl`
59
60
61
62			`1`
63			`work`
64
65
66			`0`
67			`0`
68	29	lcdsgmtr	`000000ff00000000000000010000000000000000010000000000000000000000000000000000000121000000010001000100000000000000000000000064ffffffff000000810000000000000001000001210000000100000000`
69	28	lcdsgmtr	`false`
70			`work`
71
72
73
74			`1`
75			`Design Utilities/Compile HDL Simulation Libraries`
76
77
78			`Design Utilities`
79
80			`0`
81			`0`
82			`000000ff0000000000000001000000010000000000000000000000000000000000000000000000011f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000011f0000000100000000`
83			`false`
84			`Design Utilities`
85
86			`000000ff0000000000000002000000f0000000c801000000060100000002`
87			`Implementation`
88	29	lcdsgmtr
89
90			`2`
91			`/mux32to1 - Behavioral \|home\|jurgen\|Projects\|xucpu\|src\|components\|multiplexer\|MUX.vhdl`
92			`/startup_sim - behavior \|home\|jurgen\|Projects\|xucpu\|tb\|startup_sim.vhdl`
93			`/summation - Behavioral \|home\|jurgen\|Projects\|xucpu\|src\|components\|ALU\|summation.vhdl`
94
95
96			`startup_sim - behavior (/home/jurgen/Projects/xucpu/tb/startup_sim.vhdl)`
97
98			`1`
99			`0`
100			`000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000294000000020000000000000000000000000200000064ffffffff000000810000000300000002000002940000000100000003000000000000000100000003`
101			`false`
102			`startup_sim - behavior (/home/jurgen/Projects/xucpu/tb/startup_sim.vhdl)`
103
104
105
106			`1`
107			`Design Utilities`
108
109
110
111
112			`0`
113			`0`
114			`000000ff0000000000000001000000010000000000000000000000000000000000000000000000011f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000011f0000000100000000`
115			`false`
116
117
118
119
120			`1`
121			`ISim Simulator`
122
123
124
125
126			`0`
127			`0`
128			`000000ff0000000000000001000000010000000000000000000000000000000000000000000000011f000000010000000100000000000000000000000064ffffffff0000008100000000000000010000011f0000000100000000`
129			`false`
130
131
132
133	28	lcdsgmtr

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Subversion Repositories xucpu

[/] [xucpu/] [trunk/] [target/] [Xilinx/] [32k/] [iseconfig/] [mem_32k_xucpu.projectmgr] - Blame information for rev 41