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[/] [aes_highthroughput_lowarea/] [trunk/] [verilog/] [rtl/] [shift_rows.v] - Blame information for rev 5

Line No.	Rev	Author	Line
1	5	motilito	`//---------------------------------------------------------------------------------------`
2			`//`
3			`// shift_rows module file (converted from shift_rows function)`
4			`//`
5			`// Description:`
6			`// shift rows for encryption`
7			`//`
8			`// Author(s):`
9			`// - Moti Litochevski`
10			`//`
11			`//---------------------------------------------------------------------------------------`
12
13			`module shift_rows (`
14			`si, so`
15			`);`
16
17			`input [127:0] si;`
18			`output [127:0] so;`
19
20			`wire [127:0] so;`
21
22			`assign so[127:96] = {si[127:120],si[87:80],si[47:40],si[7:0]};`
23			`assign so[95:64] = {si[95:88],si[55:48],si[15:8],si[103:96]};`
24			`assign so[63:32] = {si[63:56],si[23:16],si[111:104],si[71:64]};`
25			`assign so[31:0] = {si[31:24],si[119:112],si[79:72],si[39:32]};`
26
27			`endmodule`