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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [Integration_test/] [synthetic_sim/] [report] - Blame information for rev 56

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Line No. Rev Author Line
1 54 alirezamon
Verification Results:
2 56 alirezamon
****************************star_6 : Compile *******************************:
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         model generation is FAILED.
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         %Error: Unknown warning specified: -Wno-TIMESCALEMOD
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         %Error: Unknown warning specified: -Wno-TIMESCALEMOD
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         %Error: Unknown warning specified: -Wno-TIMESCALEMOD
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****************************star_6      : random traffic *******************************:
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         failed. Simulation model is not avaialable
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****************************star_6      : transposed 1 traffic *******************************:
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         failed. Simulation model is not avaialable

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