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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_modelsim/] [multicast_test.sv] - Blame information for rev 56

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1 54 alirezamon
// synthesis translate_off
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`include "pronoc_def.v"
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module multicast_test;
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        parameter NOC_ID=0;
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        `NOC_CONF
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        reg     reset ,clk;
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        initial begin
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                clk = 1'b0;
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                forever clk = #10 ~clk;
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        end
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        smartflit_chanel_t chan_in_all  [NE-1 : 0];
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        smartflit_chanel_t chan_out_all [NE-1 : 0];
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        pck_injct_t pck_injct_in [NE-1 : 0];
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        pck_injct_t pck_injct_out[NE-1 : 0];
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        noc_top  # (
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                .NOC_ID(NOC_ID)
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        ) the_noc (
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                .reset(reset),
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                .clk(clk),
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                .chan_in_all(chan_in_all),
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                .chan_out_all(chan_out_all),
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                .router_event( )
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        );
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        reg [NEw-1 : 0] dest_id [NE-1 : 0];
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        wire [NEw-1: 0] current_e_addr [NE-1 : 0];
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        genvar i;
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        generate
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        for(i=0; i< NE; i=i+1) begin : endpoints
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                endp_addr_encoder #( .TOPOLOGY(TOPOLOGY), .T1(T1), .T2(T2), .T3(T3), .EAw(EAw),  .NE(NE)) encode1 ( .id(i[NEw-1 :0]), .code(current_e_addr[i]));
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                multicast_injector #(
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                        .NOC_ID(NOC_ID)
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                ) pck_inj(
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                        //general
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                        .current_e_addr(current_e_addr[i]),
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                        .reset(reset),
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                        .clk(clk),
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                        //noc port
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                        .chan_in(chan_out_all[i]),
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                        .chan_out(chan_in_all[i]),
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                        //control interafce
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                        .pck_injct_in(pck_injct_in[i]),
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                        .pck_injct_out(pck_injct_out[i])
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                );
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                endp_addr_encoder #( .TOPOLOGY(TOPOLOGY), .T1(T1), .T2(T2), .T3(T3), .EAw(EAw),  .NE(NE)) encode2 ( .id(dest_id[i]), .code(pck_injct_in[i].endp_addr[EAw-1 : 0]));
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           reg [31:0]k;
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    initial begin
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`ifdef ACTIVE_LOW_RESET_MODE
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        reset = 1'b0;
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 `else
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        reset = 1'b1;
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`endif
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                        k=0;
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                        pck_injct_in[i].data =0;
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                        #10
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                        pck_injct_in[i].class_num=0;
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                        pck_injct_in[i].init_weight=1;
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                        pck_injct_in[i].vc=1;
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                        pck_injct_in[i].pck_wr=1'b0;
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                        #100
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                        @(posedge clk) #1;
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                        reset=~reset;
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                        #100
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                        @(posedge clk) #1;
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                        //if(i==1) begin
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                        //      repeat(10) begin
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                                        while (pck_injct_out[i].ready[0] == 1'b0) @(posedge clk)   #1;
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                                        pck_injct_in[i].data='h123456789ABCDEFEDCBA987654321+k;
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                                        pck_injct_in[i].size=3+(k%18);
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                                        dest_id[i]=0;
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                                        pck_injct_in[i].pck_wr=1'b1;
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                                        @(posedge clk)  #1 k++;
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                                        pck_injct_in[i].pck_wr=1'b0;
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                                        @(posedge clk)  #1 k++;
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                        //      end
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                                #10000
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                        @(posedge clk) $stop;
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                        //end
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                end
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                always @(posedge clk) begin
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                        if(pck_injct_out[i].pck_wr) begin
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                                $display ("%t:pck_inj(%d) got a packet: source=%d, size=%d, data=%h",$time,i,
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                                                pck_injct_out[i].endp_addr,pck_injct_out[i].size,pck_injct_out[i].data);
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                        end
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                end
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        end//for
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        endgenerate
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endmodule
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// synthesis translate_on
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