//////////////////////////////////////////////////////////////////////
//// ////
//// TODO ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
//// ////
//// All additional information is available in the Readme.txt ////
//// file. ////
//// ////
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2001, 2002 Authors ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
//
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.2 2002/11/21 00:33:32 mohor
// In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
// of additional logic is necessery (FIFO for looping the data).
//
// Revision 1.1 2002/09/10 10:42:06 mohor
// HASH improvement needed.
//
- Add logic for easier use of the HASH table: First write MAC address to some
register. Then issue a command. CRC is calculated from this MAC and appropriate
bit written to the HASH register.
- In loopback rx_clk is not looped back. Possible CRC error. Consider if usage of
additional logic is necessery (FIFO for looping the data).
- When sending frames bigger than MaxFL, MaxFL is sent, BD marked as finished,
TxB_IRQ interrupt is set and MTxErr is set for a short period. Fix MTxErr or
prevent sending too big frames or set TxE_IRQ instead.
